參數(shù)資料
型號: DSP56F827
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Hybrid Controller(16位混合控制器)
中文描述: 16位混合控制器(16位混合控制器)
文件頁數(shù): 10/52頁
文件大?。?/td> 1175K
代理商: DSP56F827
10
56F827 Technical Data
D0
(GPIOG0)
125
Input/Output
Input/Output
Data Bus
—D0–D15 specify the data for external Program or Data
memory accesses. D0-D15 are tri-stated when the external bus is
inactive.
Port G GPIO
—These 16 General Purpose I/O (GPIO) pins can be
individually programmed as input or output pins.
After reset, the default state is Address Bus.
D1
(GPIOG1)
126
D2
(GPIOG2)
127
D3
(GPIOG3)
128
D4
(GPIOG4)
1
D5
(GPIOG5)
2
D6
(GPIOG6)
3
D7
(GPIOG7)
6
D8
(GPIOG8)
7
D9
(GPIOG9)
8
D10
(GPIOG10)
9
D11
(GPIOG11)
10
D12
(GPIOG12)
11
D13
(GPIOG13)
12
D14
(GPIOG14)
13
D15
(GPIOG15)
14
PS
(PCS0)
18
Output
Program Memory Select
—PS is asserted low for external program
memory access. This pin can also be programmed as a programmable
chip select.
Table 3. 56F827 Signal and Package Information for the 128 Pin LQFP (Continued)
Signal Name
Pin No.
Type
Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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