參數(shù)資料
型號(hào)： DSP56F827
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁(yè)數(shù)： 30/52頁(yè)
文件大?。?/td> 1175K
代理商： DSP56F827
30
56F827 Technical Data
3.8 Reset, Stop, Wait, Mode Select, and Interrupt Timing
Table 14. Reset, Stop, Wait, Mode Select, and Interrupt Timing
1, 5
Figure 15. External Bus Asynchronous Timing
Operating Conditions:
V
SSIO
=V
SS
= V
SSA
= 0V, V
DDA
=V
DDIO
=3.0–3.6V, V
DD
= 2.25–2.75V, T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
op
= 80MHz
Characteristic
Symbol
Min
Max
Unit
See
Figure
RESET Assertion to Address, Data and Control
Signals High Impedance
t
RAZ
—
21
ns
Figure 16
Minimum RESET Assertion Duration
2
OMR Bit 6 = 0
OMR Bit 6 = 1
t
RA
275,000T
128T
—
—
ns
ns
Figure 16
RESET Deassertion to First External Address Output
t
RDA
33T
34T
ns
Figure 16
Edge-sensitive Interrupt Request Width
t
IRW
1.5T
—
ns
Figure 17
IRQA, IRQB Assertion to External Data Memory
Access Out Valid, caused by first instruction execution
in the interrupt service routine
t
IDM
15T
—
ns
Figure 18
IRQA, IRQB Assertion to General Purpose Output
Valid, caused by first instruction execution in the
interrupt service routine
t
IG
16T
—
ns
Figure 18
A0–A15,
PS, DS
(See Note)
WR
D0–D15
RD
Note:
During read-modify-write instructions and internal instructions, the address lines do not change state.
Data In
Data Out
t
AWR
t
ARDA
t
ARDD
t
RDA
t
RD
t
RDRD
t
RDWR
t
WRWR
t
WR
t
DOS
t
WRD
t
WRRD
t
AD
t
DOH
t
DRD
t
RDD
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56F827/D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller
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