參數(shù)資料
型號： EFM32TG822F32
廠商： Energy Micro
文件頁數(shù)： 24/136頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品： EFM32 Tiny Gecko
標準包裝： 1
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 37
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 標準包裝
其它名稱： 914-1031-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
12
www.energymicro.com
Reserved
0
1
31
FAULTMASK
Table 2.8. FAULTMASK register bit assignments
Bits
Name
Function
[31:1]
-
Reserved
[0]
FAULTMASK
0 = no effect
1 = prevents the activation of all exceptions except for NMI.
The processor clears the FAULTMASK bit to 0 on exit from any exception handler except the NMI
handler.
2.1.3.6.3 Base Priority Mask Register
The BASEPRI register defines the minimum priority for exception processing. When BASEPRI is set
to a nonzero value, it prevents the activation of all exceptions with same or lower priority level as the
BASEPRI value. See the register summary in Table 2.2 (p. 7) for its attributes. The bit assignments
are:
BASEPRI
Reserved
31
0
7
8
Table 2.9. BASEPRI register bit assignments
Bits
Name
Function
[31:8]
-
Reserved
[7:0]
BASEPRI
1
Priority mask bits:
0x0000
= no effectNonzero = defines the base priority for exception processing.
The processor does not process any exception with a priority value greater than or equal to
BASEPRI.
1This field is similar to the priority fields in the interrupt priority registers. The processor implements only bits[7:5 of this field,
bits[4:0] read as zero and ignore writes.See Section 4.2.7 (p. 92) for more information. Remember that higher priority field
values correspond to lower exception priorities.
2.1.3.7 CONTROL register
The CONTROL register controls the stack used and the privilege level for software execution when the
processor is in Thread mode. See the register summary in Table 2.2 (p. 7) for its attributes. The
bit assignments are:
31
2 1 0
Reserved
Act ive st ack point er
Thread m ode privilege level
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