參數(shù)資料
型號(hào): EFM32TG822F32
廠商: Energy Micro
文件頁數(shù): 65/136頁
文件大小: 0K
描述: IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品: EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝: 1
系列: Tiny Gecko
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 32MHz
連通性: I²C,IrDA,智能卡,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 37
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b,D/A 1x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 914-1031-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
34
www.energymicro.com
Mnemonic
Operands
Brief description
Flags
Page
CLREX
-
Clear Exclusive
-
CLZ
Rd, Rm
Count leading zeros
-
CMN, CMNS
Rn, Op2
Compare Negative
N,Z,C,V
CMP, CMPS
Rn, Op2
Compare
N,Z,C,V
CPSID
iflags
Change Processor State, Disable Interrupts
-
CPSIE
iflags
Change Processor State, Enable Interrupts
-
DMB
-
Data Memory Barrier
-
DSB
-
Data Synchronization Barrier
-
EOR, EORS
{Rd,} Rn, Op2
Exclusive OR
N,Z,C
ISB
-
Instruction Synchronization Barrier
-
IT
-
If#Then condition block
-
LDM
Rn{!}, reglist
Load Multiple registers, increment after
-
LDMDB,
LDMEA
Rn{!}, reglist
Load Multiple registers, decrement before
-
LDMFD,
LDMIA
Rn{!}, reglist
Load Multiple registers, increment after
-
LDR
Rt, [Rn, #offset]
Load Register with word
-
LDRB, LDRBT
Rt, [Rn, #offset]
Load Register with byte
-
LDRD
Rt, Rt2, [Rn,
#offset]
Load Register with two bytes
-
LDREX
Rt, [Rn, #offset]
Load Register Exclusive
-
LDREXB
Rt, [Rn]
Load Register Exclusive with byte
-
LDREXH
Rt, [Rn]
Load Register Exclusive with halfword
-
LDRH, LDRHT
Rt, [Rn, #offset]
Load Register with halfword
-
LDRSB,
LDRSBT
Rt, [Rn, #offset]
Load Register with signed byte
-
LDRSH,
LDRSHT
Rt, [Rn, #offset]
Load Register with signed halfword
-
LDRT
Rt, [Rn, #offset]
Load Register with word
-
LSL, LSLS
Rd, Rm, <Rs|#n>
Logical Shift Left
N,Z,C
LSR, LSRS
Rd, Rm, <Rs|#n>
Logical Shift Right
N,Z,C
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