參數(shù)資料
型號: EM78P451S
廠商: ELAN Microelctronics Corp .
英文描述: Quad, Serial, 8-Bit DACs with Rail-to-Rail Outputs
中文描述: 8位微控制器的OTP ROM的
文件頁數(shù): 46/54頁
文件大?。?/td> 421K
代理商: EM78P451S
EM78P451S
8-Bit Microcontroller with OTP ROM
42
Product Specification (V1.0) 06.01.2004
(This specification is subject to change without further notice)
Bit 9 (PTB):
Protect bit.
0: Protect enabled
1: Protect disabled
Bit 8 (HLF):
XTAL frequency selection.
0: Low frequency (32.768KHz)
1: High frequency
This bit is useful only when Bit 12 (MS) is 1. When MS is 0, HLF must be 0.
Bit 7 (RCT)
: Resistor Capacitor.
0: internal RC
1: external RC
Bit 6 (HLP):
Power consumption selection.
0: Low power
1: High power
Bit 5 ~ Bit 4:
DEL1 and DEL0 (SDI) input delay time options.
DEL 1
1
0
1
DEL 0
1
1
0
Delay time
0 ns
50 ns
100 ns
Bit3~0 (REN):
reset pin enable bit
0: enable, P70/reset=>reset pin
1: disable, P70/reset=> P70
WORD 1 ( user’s ID code)
12
11
10
9
8
7
6
5
4
3
2
1
0
ID12
ID11
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
4.11 Instruction Set
Each instruction in the instruction set is a 13-bit word divided into an OP code and one
or more operands. All instructions are executed within one single instruction cycle
(consisting of 2 oscillator periods), unless the program counter is changed by-
(a)
Executing the instruction "MOV R2,A", "ADD R2,A", "TBL", or any other instructions
that write to R2 (e.g. "SUB R2,A", "BS R2,6", "CLR R2",
).
(b)
execute CALL, RET, RETI, RETL, JMP, Conditional skip (JBS, JBC, JZ, JZA, DJZ,
DJZA) which were tested to be true.
Under these cases, the execution takes two instruction cycles.
In addition, the instruction set has the following features:
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