參數(shù)資料
型號(hào)： EM78P569
廠商： ELAN Microelctronics Corp .
英文描述： 8 - BIT OTP MICRO CONTROLLER
中文描述： 8 -位微控制器檢察官辦公室
文件頁(yè)數(shù)： 14/58頁(yè)
文件大?。?/td> 475K
代理商： EM78P569
EM78P569
8-bit OTP Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
8/19/2004 V4.4
SEG21, SEG20
SEG23, SEG22
SEG25, SEG24
SEG27, SEG26
SEG29, SEG28
SEG31, SEG30
0AH
0BH
0CH
0DH
0EH
0FH
Bit 4 ~ Bit 5 : Unused
Bit 6 ~ Bit 7(DA8~DA9) : DA8 and DA9 are
DAC MSB when R7 page1 bit 3(DARES) is set
,.
or unused
when DAREF clear to 0. When using 10 bits resolution DAC, DAO output voltage will
unchanged after write data to these two bits. DAO pin will change after write new data to DAC
low 8 bits data buffer (RA PAGE1).
PAGE2 (SPI control)
7
6
5
4
3
RBF
SPIE
SRO
SE
SCES
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
2
1
0
SBR2
R/W-0
SBR1
R/W-0
SBR0
R/W-0
Bit 0
SPI module
SCK
Bit7
Salve Device
SPIR register
SDI
SPIW register
SPIS Reg
SDO
SDO
SCK
SDI
Master Device
R5 page2
Fig.4 Single SPI Master / Salve Communication
Fig. 4 shows how SPI to communicate with other device by SPI module. If SPI is a master controller, it
sends clock through the SCK pin. An 8-bit data is transmitted and received at the same time. If SPI,
however, is defined as a slave, its SCK pin could be programmed as an input pin. Data will continue to be
shifted on a basis of both the clock rate and the selected edge.
Bit 0 ~ Bit 2 (SBR0 ~ SBR2) : SPI baud rate selection bits
SBR2
0
0
0
0
1
1
1
1
SBR1
0
0
1
1
0
0
1
1
SBR0
0
1
0
1
0
1
0
1
Mode
Master
Master
Master
Master
Master
Master
Slave
Master
Baud rate
Fsco
Fsco/2
Fsco/4
Fsco/8
Fsco/16
Fsco/32
16.384k
<Note> Fsco = CPU instruction clock
For example :
If PLL is enabled and main clock is selected to 3.5826MHz, the instruction clock is 3.5826MHz/2
Fsco=3.5862MHz/2
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