參數(shù)資料
型號(hào): EM78P569
廠商: ELAN Microelctronics Corp .
英文描述: 8 - BIT OTP MICRO CONTROLLER
中文描述: 8 -位微控制器檢察官辦公室
文件頁數(shù): 38/58頁
文件大?。?/td> 475K
代理商: EM78P569
EM78P569
8-bit OTP Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
8/19/2004 V4.4
Bit 1 :
(undefined) not allowed to use
Bit 2(ADPWR) : AD converter power control, 1/0
enable/disable
Bit 3 ~ Bit 4 (ADCLK0 ~ ADCLK1) : AD circuit ‘s sampling clock source.
For PLL clock = 895.658kHz ~17.9MHz (CLK2~CLK0 = 001 ~ 110)
ADCLK1 ADCLK0
Sampling rate
Operation voltage
0
0
1
1
0
1
0
1
74.6K
37.4K
18.7K
9.3K
>=3.5V
>=3.0V
>=2.5V
>=2.5V
For PLL clock = 447.829kHz (CLK2~CLK0 = 000)
ADCLK1 ADCLK0
Sampling rate
Operation voltage
0
0
1
1
0
1
0
1
37.4K
18.7K
9.3K
4.7K
>=3.0V
>=3.0V
>=2.5V
>=2.5V
This is a CMOS multi-channel 10-bit successive approximation A/D converter.
Features
74.6kHz maximum conversion speed at 5V.
Adjusted full scale input
External reference voltage input or internal(VDD) reference voltage
6 analog inputs multiplexed into one A/D converter
Power down mode for power saving
A/D conversion complete interrupt
Interrupt register, A/D control and status register, and A/D data register
Fig.13 ADC sampling clock control logic
fs
Nx = 1
895.658kHz
74.638kHz
895.658kHz
74.638kHz
895.658kHz
74.638kHz
895.658kHz
74.638kHz
895.658kHz
74.638kHz
895.658kHz
74.638kHz
447.829kHz
37.391kHz
fpll
Mx
16
12
8
4
2
1
1
fadcon = fadc / 12
Nx = 2
37.391kHz
37.391kHz
37.391kHz
37.391kHz
37.391kHz
37.391kHz
18.659khz
Nx = 4
18.659khz
18.659khz
18.659khz
18.659khz
18.659khz
18.659khz
9.329kHz
Nx = 8
9.329kHz
9.329kHz
9.329kHz
9.329kHz
9.329kHz
9.329kHz
4.665kHz
14.331MHz
10.747MHz
7.165MHz
3.582MHz
1.791MHz
895.658kHz
447.829kHz
Bit 5 ~ Bit 7(IN0~ IN2) : Input channel selection of AD converter
These two bits can choose one of three AD input.
IN2
IN1
IN0
0
0
0
0
0
1
0
1
0
Input
AD1
AD2
AD3
Programmable
divider
1/Mx
Divider
Nx
10-bit
ADC
ADCLK1~ADCLK0
fs
ADC output
PLL
ENPLL
CLK2 ~ CLK0
fpll
fadc
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