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參數(shù)資料
| 型號： | EM78P569 |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 8 - BIT OTP MICRO CONTROLLER |
| 中文描述： | 8 -位微控制器檢察官辦公室 |
| 文件頁數(shù)： | 9/58頁 |
| 文件大?。?/td> | 475K |
| 代理商： | EM78P569 |
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EM78P569
8-bit OTP Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
8/19/2004 V4.4
10-bit D/A
DAO
SCK
SDO
SDI
PWM
PWM1
O(P67)
IO (PORT76)
O (PORT75)
O (PC1)
DAO is 10 bit DA output shared with PORT67
Master: output pin, Slave: input pin. This pin shared with PORT76.
Output pin for serial data transferring. This pin shared with PORT75.
Input pin for receiving data. This pin shared with PORT74.
Pulse width modulation output channel 1
Shared with PC1
Pulse width modulation output channel 2
Shared with PC2
PORT5 can be INPUT or OUTPUT port each bit.
PORT5(7:5) are shared with LCD Segment signal.
PORT6 can be INPUT or OUTPUT port each bit.
PORT7 can be INPUT or OUTPUT port each bit.
PORT7(4~6) are shared with SPI interface pins
Internal Pull high function.
PORT7(0~3) has interrupt function.
PORT8 can be INPUT or OUTPUT port each bit.
Internal pull high.
PORT85 ~ P87 are shared with ADC input
PORT8(0~3) have wake-up functions(set by RE PAGE0)
PORT9 can be INPUT or OUTPUT port each bit.
PORT9 are shared with LCD Segment signal.
PORTB can be INPUT or OUTPUT port each bit.
PORTB are shared with LCD Segment signal.
PORTC can be INPUT or OUTPUT port each bit.
PORTC(0~1) are shared with PWM output pins
PORTC(7:5) are shared with LCD Segment signal.
mclk/2’s CLK output.(25% duty cycle)
Interrupt sources. Once PORT70 has a falling edge or rising edge signal
(controlled by CONT register), it will generate a interruption.
Interrupt sources which has the same interrupt flag. Any pin from PORT71
has a falling edge signal, it will generate a interruption.
Interrupt sources which has the same interrupt flag. Any pin from PORT72
has a falling edge signal, it will generate a interruption.
Interrupt sources which has the same interrupt flag. Any pin from PORT73
has a falling edge signal, it will generate a interruption.
Low reset
PWM2
O (PC2)
IO
P55~P57
I/O
P60 ~P67
P70 ~ P77
I/O
I/O
P80 ~ P87
I/O
P90 ~ P97
I/O
PB0 ~ PB7
I/O
PC0 ~ PC7
I/O
SCLKO
INT0
O
(PORT70)
INT1
(PORT71)
INT2
(PORT72)
INT3
(PORT73)
/RESET
I
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