參數(shù)資料
型號： ENC424J600T-I/PT
廠商： Microchip Technology
文件頁數(shù)： 128/168頁
文件大?。?/td> 0K
描述： IC ETHERNET CTRLR W/SPI 44-TQFP
視頻文件： Fast 100 Mbps Ethernet PICtail Plus Overview
標準包裝： 1,200
控制器類型： 以太網(wǎng)控制器（IEEE 802.3）
接口： SPI
電源電壓： 3 V ~ 3.6 V
電流 - 電源： 96mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-TQFP
供應(yīng)商設(shè)備封裝： 44-TQFP（10x10）
包裝： 帶卷 (TR)
配用： AC164132-ND - BOARD DAUGHTER PICTAIL ETHERNET
PIC16CR7X
DS21993C-page 60
2007 Microchip Technology Inc.
REGISTER 9-1:
SSPSTAT: SYNC SERIAL PORT STATUS (ADDRESS 94h)
R/W-0
R-0
SMP
CKE
D/A
PS
R/W
UA
BF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
SMP: SPI Data Input Sample Phase bit
SPI Master mode:
1
= Input data sampled at end of data output time
0
= Input data sampled at middle of data output time (Microwire)
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
I2C mode:
This bit must be maintained clear
bit 6
CKE: SPI Clock Edge Select bit (Figure 9-2, Figure 9-3, and Figure 9-4)
SPI mode, CKP = 0:
1
= Data transmitted on rising edge of SCK (Microwire alternate)
0
= Data transmitted on falling edge of SCK
SPI mode, CKP = 1:
1
= Data transmitted on falling edge of SCK (Microwire default)
0
= Data transmitted on rising edge of SCK
I2C mode:
This bit must be maintained clear
bit 5
D/A: Data/Address bit (I2C mode only)
1
= Indicates that the last byte received or transmitted was data
0
= Indicates that the last byte received or transmitted was address
bit 4
P: Stop bit (I2C mode only)
This bit is cleared when the SSP module is disabled, or when the Start bit is detected last.
SSPEN is cleared.
1
= Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)
0
= Stop bit was not detected last
bit 3
S: Start bit (I2C mode only)
This bit is cleared when the SSP module is disabled, or when the Stop bit is detected last.
SSPEN is cleared.
1
= Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0
= Start bit was not detected last
bit 2
R/W: Read/Write bit Information (I2C mode only)
This bit holds the R/W bit information following the last address match. This bit is only valid from the address match
to the next Start bit, Stop bit, or ACK bit.
1
= Read
0
= Write
bit 1
UA: Update Address bit (10-bit I2C mode only)
1
= Indicates that the user needs to update the address in the SSPADD register
0
= Address does not need to be updated
bit 0
BF: Buffer Full Status bit
Receive (SPI and I2C modes):
1
= Receive complete, SSPBUF is full
0
= Receive not complete, SSPBUF is empty
Transmit (I2C mode only):
1
= Transmit in progress, SSPBUF is full
0
= Transmit complete, SSPBUF is empty
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