Notes to tables: (1) All timing parameters are described i" />
參數(shù)資料
型號(hào): EPF10K100ARI240-3N
廠商: Altera
文件頁數(shù): 18/128頁
文件大?。?/td> 0K
描述: IC FLEX 10KA FPGA 100K 240-RQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
產(chǎn)品變化通告: Package Change 30/Jun/2010
標(biāo)準(zhǔn)包裝: 24
系列: FLEX-10K®
LAB/CLB數(shù): 624
邏輯元件/單元數(shù): 4992
RAM 位總計(jì): 24576
輸入/輸出數(shù): 189
門數(shù): 158000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 240-RQFP(32x32)
114
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
All timing parameters are described in Tables 32 through 38 in this data sheet.
(2)
Using an LE to register the signal may provide a lower setup time.
(3)
This parameter is specified by characterization.
Tables 106 through 112 show EPF10K250A device internal and external
timing parameters.
Table 106. EPF10K250A Device LE Timing Microparameters
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
MinMax
tLUT
0.9
1.0
1.4
ns
tCLUT
1.2
1.3
1.6
ns
tRLUT
2.0
2.3
2.7
ns
tPACKED
0.4
0.5
ns
tEN
1.4
1.6
1.9
ns
tCICO
0.2
0.3
ns
tCGEN
0.4
0.6
ns
tCGENR
0.8
1.0
1.1
ns
tCASC
0.7
0.8
1.0
ns
tC
1.2
1.3
1.6
ns
tCO
0.6
0.7
0.9
ns
tCOMB
0.5
0.6
0.7
ns
tSU
1.2
1.4
1.7
ns
tH
1.2
1.3
1.6
ns
tPRE
0.7
0.8
0.9
ns
tCLR
0.7
0.8
0.9
ns
tCH
2.5
3.0
3.5
ns
tCL
2.5
3.0
3.5
ns
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