Notes to tables: (1) Microparameters are timing delays cont" />
參數(shù)資料
型號: EPF10K100ARI240-3N
廠商: Altera
文件頁數(shù): 90/128頁
文件大小: 0K
描述: IC FLEX 10KA FPGA 100K 240-RQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
產(chǎn)品變化通告: Package Change 30/Jun/2010
標(biāo)準(zhǔn)包裝: 24
系列: FLEX-10K®
LAB/CLB數(shù): 624
邏輯元件/單元數(shù): 4992
RAM 位總計: 24576
輸入/輸出數(shù): 189
門數(shù): 158000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 240-RQFP(32x32)
64
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
Microparameters are timing delays contributed by individual architectural elements. These parameters cannot be
measured explicitly.
(2)
Operating conditions: VCCIO = 5.0 V ± 5% for commercial use in FLEX 10K devices.
VCCIO = 5.0 V ± 10% for industrial use in FLEX 10K devices.
VCCIO = 3.3 V ± 10% for commercial or industrial use in FLEX 10KA devices.
(3)
Operating conditions: VCCIO = 3.3 V ± 10% for commercial or industrial use in FLEX 10K devices.
VCCIO = 2.5 V ± 0.2 V for commercial or industrial use in FLEX 10KA devices.
(4)
Operating conditions: VCCIO = 2.5 V, 3.3 V, or 5.0 V.
(5)
Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered.
(6)
EAB macroparameters are internal parameters that can simplify predicting the behavior of an EAB at its boundary;
these parameters are calculated by summing selected microparameters.
(7)
These parameters are worst-case values for typical applications. Post-compilation timing simulation and timing
analysis are required to determine actual worst-case performance.
(8)
External reference timing parameters are factory-tested, worst-case values specified by Altera. A representative
subset of signal paths is tested to approximate typical device applications.
(9)
Contact Altera Applications for test circuit specifications and test conditions.
(10) These timing parameters are sample-tested only.
Figures 29 and 30 show the asynchronous and synchronous timing
waveforms, respectively, for the EAB macroparameters in Table 34.
Figure 29. EAB Asynchronous Timing Waveforms
EAB Asynchronous Write
EAB Asynchronous Read
WE
a0
d0
d3
tEABRCCOMB
a1
a2
a3
d2
tEABAA
d1
Address
Data-Out
WE
a0
din1
dout2
tEABDD
a1
a2
din1
din0
tEABWCCOMB
tEABWASU
tEABWAH
tEABWDH
tEABWDSU
tEABWP
din0
Data-In
Address
Data-Out
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