參數(shù)資料
型號(hào)： EPM7512BFC256-5
廠商： Altera
文件頁(yè)數(shù)： 11/66頁(yè)
文件大?。?/td> 0K
描述： IC MAX 7000 CPLD 512 256-FBGA
標(biāo)準(zhǔn)包裝： 90
系列： MAX® 7000B
可編程類型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 5.5ns
電壓電源 - 內(nèi)部： 2.375 V ~ 2.625 V
邏輯元件/邏輯塊數(shù)目： 32
宏單元數(shù)： 512
門數(shù)： 10000
輸入/輸出數(shù)： 212
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-FBGA（17x17）
包裝： 托盤
其它名稱： 544-2361
Altera Corporation
19
MAX 7000B Programmable Logic Device Data Sheet
Programming
with External
Hardware
MAX 7000B devices can be programmed on Windows-based PCs with an
Altera Logic Programmer card, the Master Programming Unit (MPU),
and the appropriate device adapter. The MPU performs continuity
checking to ensure adequate electrical contact between the adapter and
the device.
f For more information, see the Altera Programming Hardware Data Sheet.
The Altera software can use text- or waveform-format test vectors created
with the Altera Text Editor or Waveform Editor to test the programmed
device. For added design verification, designers can perform functional
testing to compare the functional device behavior with the results of
simulation.
Data I/O, BP Microsystems, and other programming hardware
manufacturers provide programming support for Altera devices. For
more information, see Programming Hardware Manufacturers.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
MAX 7000B devices include the JTAG boundary-scan test circuitry
defined by IEEE Std. 1149.1. Table 6 describes the JTAG instructions
supported by MAX 7000B devices. The pin-out tables starting on page 59
of this data sheet show the location of the JTAG control pins for each
device. If the JTAG interface is not required, the JTAG pins are available
as user I/O pins.
Table 6. MAX 7000B JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the
boundary-scan test data to pass synchronously through a selected device to adjacent
devices during normal operation.
CLAMP
Allows the values in the boundary-scan register to determine pin states while placing the
1-bit bypass register between the TDI and TDO pins.
IDCODE
Selects the IDCODE register and places it between the TDI and TDO pins, allowing the
IDCODE to be serially shifted out of TDO.
USERCODE
Selects the 32-bit USERCODE register and places it between the TDI and TDO pins,
allowing the USERCODE value to be shifted out of TDO.
ISP Instructions
These instructions are used when programming MAX 7000B devices via the JTAG ports
with the MasterBlaster or ByteBlasterMV download cable, or using a Jam File (.jam),
Jam Byte-Code File (.jbc), or Serial Vector Format File (.svf) via an embedded
processor or test equipment.
相關(guān)PDF資料
PDF描述
EPM9560RI240-20 IC MAX 9000 CPLD 560 240-RQFP
ET80960JT10016 IC MPU I960JT 3V 100MHZ 132-QFP
EX256-PTQG100I IC FPGA ANTIFUSE 12K 100-TQFP
EXPANDIO-USB-FS-DIL-28 IC I/O EXPANDER USB 21B 28DIP
FIN1001M5 IC DRIVER 3.3V LVDS HS SOT-23
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7512BFC256-5N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BFC256-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BFC256-7N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BFI256-10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM7512BFI256-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*