參數(shù)資料
型號(hào)： EPM9560RC240-15
廠商： Altera
文件頁(yè)數(shù)： 16/46頁(yè)
文件大?。?/td> 0K
描述： IC MAX 9000 CPLD 560 240-RQFP
產(chǎn)品變化通告： Package Change 30/Jun/2010
標(biāo)準(zhǔn)包裝： 24
系列： Max® 9000
可編程類(lèi)型： 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1)： 15.0ns
電壓電源 - 內(nèi)部： 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目： 35
宏單元數(shù)： 560
門(mén)數(shù)： 12000
輸入/輸出數(shù)： 191
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 240-BFQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 240-RQFP（32x32）
包裝： 托盤(pán)
其它名稱(chēng)： 544-2366
Altera Corporation
23
MAX 9000 Programmable Logic Device Family Data Sheet
Programming
with External
Hardware
MAX 9000 devices can be programmed on Windows-based PCs with an
Altera Logic Programmer card, the Master Programming Unit (MPU),
and the appropriate device adapter. The MPU performs continuity
checking to ensure adequate electrical contact between the adapter and
the device.
f For more information, see the Altera Programming Hardware Data Sheet.
The MAX+PLUS II software can use text- or waveform-format test vectors
created with the MAX+PLUS II Text Editor or Waveform Editor to test a
programmed device. For added design verification, designers can
perform functional testing to compare the functional behavior of a
MAX 9000 device with the results of simulation.
Data I/O, BP Microsystems, and other programming hardware
manufacturers also provide programming support for Altera devices.
f For more information, see Programming Hardware Manufacturers.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
MAX 9000 devices support JTAG BST circuitry as specified by IEEE Std.
1149.1-1990. Table 10 describes the JTAG instructions supported by the
MAX 9000 family. The pin-out tables starting on page 38 show the
location of the JTAG control pins for each device. If the JTAG interface is
not required, the JTAG pins are available as user I/O pins.
Table 10. MAX 9000 JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
EXTEST
Allows the external circuitry and board-level interconnections to be tested by forcing a test
pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
IDCODE
Selects the IDCODE register and places it between TDI and TDO, allowing the IDCODE
to be shifted out of TDO. Supported by the EPM9320A, EPM9400, EPM9480, and
EPM9560A devices only.
UESCODE
Selects the user electronic signature (UESCODE) register and allows the UESCODE to
be shifted out of TDO serially. This instruction is supported by MAX 9000A devices only.
ISP Instructions
These instructions are used when programming MAX 9000 devices via the JTAG ports
with the BitBlaster or ByteBlasterMV download cable, or using a Jam File (.jam), Jam
Byte-Code File (.jbc), or Serial Vector Format (.svf) File via an embedded processor or
test equipment.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM9560RC240-15YY 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz CMOS Technology 5V 240-Pin RQFP 制造商:Altera Corporation 功能描述:CPLD MAX 9000 Family 12K Gates 560 Macro Cells 117.6MHz 5V 240-Pin RQFP
EPM9560RC240-20 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 9000 560 Macro 191 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM9560RC304-15 制造商:Altera Corporation 功能描述:IC MAX
EPM9560RI208-15 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
EPM9560RI208-20 制造商:Altera Corporation 功能描述:IC MAX
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