參數(shù)資料
型號： EVAL-AD5522EBUZ
廠商： Analog Devices Inc
文件頁數(shù)： 2/64頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR 12X12MM AD5522
標準包裝： 1
主要目的： 測試與測量，參數(shù)測量單元（PMU）
已用 IC / 零件： AD5522
已供物品： 板
AD5522
Data Sheet
Rev. E | Page 10 of 64
Parameter
Min
Max
Unit
Test Conditions/Comments
DIE TEMPERATURE SENSOR
Accuracy2
±7
°C
Output Voltage at 25°C
1.5
V
Output Scale Factor2
4.6
mV/°C
Output Voltage Range2
0
3
V
INTERACTION AND CROSSTALK2
DC Crosstalk (FOHx)
0.05
0.65
mV
DC change resulting from a dc change in any DAC
in the device, FV and FI modes, ±2 mA range,
CLOAD = 200 pF, RLOAD = 5.6 kΩ
DC Crosstalk (MEASOUTx)
0.05
0.65
mV
DC change resulting from a dc change in any DAC
in the device, MV and MI modes, ±2 mA range,
CLOAD = 200 pF, RLOAD = 5.6 kΩ
DC Crosstalk Within a Channel
0.05
mV
All channels in FVMI mode, one channel at midscale;
measure the current for one channel in the lowest
current range for a change in comparator or clamp
DAC levels for that PMU
SPI INTERFACE LOGIC INPUTS
Input High Voltage, VIH
1.7/2.0
V
(2.3 V to 2.7 V)/(2.7 V to 5.25 V), JEDEC-compliant
input levels
Input Low Voltage, VIL
0.7/0.8
V
(2.3 V to 2.7 V)/(2.7 V to 5.25 V), JEDEC-compliant
input levels
Input Current, IINH, IINL
1
+1
A
Input Capacitance, CIN2
10
pF
CMOS LOGIC OUTPUTS
SDO, CPOx
Output High Voltage, VOH
DVCC 0.4
V
Output Low Voltage, VOL
0.4
V
IOL = 500 A
Tristate Leakage Current
2
+2
A
SDO, CPOH1/SDO
1
+1
A
All other output pins
Output Capacitance2
10
pF
OPEN-DRAIN LOGIC OUTPUTS
BUSY, TMPALM, CGALM
Output Low Voltage, VOL
0.4
V
IOL = 500 A, CLOAD = 50 pF, RPULLUP = 1 kΩ
Output Capacitance2
10
pF
LVDS INTERFACE LOGIC INPUTS
REDUCED RANGE LINK2
Input Voltage Range
875
1575
mV
Input Differential Threshold
100
+100
mV
External Termination Resistance
80
100
120
Ω
Differential Input Voltage
100
mV
LVDS INTERFACE LOGIC OUTPUTS
REDUCED RANGE LINK
Output Offset Voltage
1200
mV
Output Differential Voltage
400
mV
POWER SUPPLIES
AVDD
10
28
V
|AVDD AVSS| ≤ 33 V
AVSS
23
5
V
DVCC
2.3
5.25
V
AIDD
26
mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard disabled
AISS
26
mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard disabled
AIDD
28
mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard enabled
AISS
28
mA
Internal ranges (±5 μA to ±2 mA), excluding load
conditions; comparators and guard enabled
AIDD
36
mA
External range, excluding load conditions
AISS
36
mA
External range, excluding load conditions
DICC
1.5
mA
Maximum Power Dissipation2
7
W
Maximum power that should be dissipated in this
package under worst-case load conditions; careful
consideration should be given to supply selection
and thermal design
相關PDF資料
PDF描述
MAX8664BEEP+T IC CNTRLR DUAL OUT 20-QSOP
SCRH8D28-100 INDUCTOR SMD 10UH 2.30A 100KHZ
MAX16948AGTE/V+T IC LDO/SWITCH ADJ DUAL 16TQFN
VI-JW2-EZ-S CONVERTER MOD DC/DC 15V 25W
VI-JW1-EZ-S CONVERTER MOD DC/DC 12V 25W
相關代理商/技術參數(shù)
參數(shù)描述
EVAL-AD5532EB 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Infinite Sample-and-Hold
EVAL-AD5532EBZ 功能描述:BOARD EVAL FOR AD5532 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5532HSEBZ 功能描述:BOARD EVAL FOR AD5532HS RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5533EB 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Precision Infinite Sample-and-Hold
EVAL-AD5535BEBZ 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*