- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16568 > EVAL-AD5522EBUZ (Analog Devices Inc)BOARD EVAL FOR 12X12MM AD5522 PDF資料下載
參數(shù)資料
| 型號： | EVAL-AD5522EBUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR 12X12MM AD5522 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 測試與測量，參數(shù)測量單元（PMU） |
| 已用 IC / 零件： | AD5522 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
AD5522
Data Sheet
Rev. E | Page 34 of 64
When configured as DUTGND per channel, this dual function
pin is no longer connected to the input of the guard amplifier.
Instead, it is connected to the low end of the instrumentation
amplifier (SW14a), and the input of the guard amplifier is
connected internally to MEASVHx (SW13a).
DUTGND
MEASURE
VOLTAGE
IN-AMP
MEASVH[0:3]
GUARD[0:3]
GUARDIN[0:3]/
DUTGND[0:3]
DUT
GUARD
AMP
SW14
SW13
SW16
b
a
–
+
×1
AGND
06197-
029
Figure 49. Using the DUTGND per Channel Feature
GUARD AMPLIFIER
A guard amplifier allows the user to bootstrap the shield of
the cable to the voltage applied to the DUT, ensuring minimal
drops across the cable. This is particularly important for
measurements requiring a high degree of accuracy and in leakage
current testing.
If not required, all four guard amplifiers can be disabled via the
serial interface (system control register). Disabling the guard
amplifiers decreases power consumption by 400 μA per channel.
As described in the Device Under Test Ground (DUTGND)
section, GUARDINx/DUTGNDx are dual function pins. Each
pin can function either as a guard amplifier input for one chan-
nel or as a DUTGND input for one channel, depending on the
requirements of the end application (see Figure 49).
A guard alarm event occurs when the guard output moves more
than 100 mV away from the guard input voltage for more than
200 μs. In this case, the event is flagged via the open-drain output
CGALM. Because the guard and clamp alarm functions share
the same alarm output, CGALM, the alarm information (alarm
trigger and alarm channel) is available via the serial interface in
the alarm status register.
Alternatively, the serial interface allows the user to set up the
CGALM output to flag either the clamp status or the guard
status. By default, this open-drain alarm pin is an unlatched
output, but it can be configured as a latched output via the serial
interface (system control register).
COMPENSATION CAPACITORS
Each channel requires an external compensation capacitor
(CCOMP) to ensure stability into the maximum load capacitance
while ensuring that settling time is optimized. In addition, one
CFF pin per channel is provided to further optimize stability and
settling time performance when in force voltage (FV) mode. When
changing from force current (FI) mode to FV mode, the internal
switch connecting the CFF capacitor is automatically closed.
Although the force amplifier is designed to drive load capacitances
up to 10 nF (with CCOMP capacitor = 100 pF), it is possible to
use larger compensation capacitor values to drive larger loads,
at the expense of an increase in settling time. If a wide range of
load capacitances must be driven, an external multiplexer
connected to the CCOMPx pin allows optimization of settling
time vs. stability. The series resistance of a switch placed on
CCOMPx should typically be <50 Ω.
Suitable multiplexers for use are the ADG1404, ADG1408, or
one of the multiplexers in the ADG4xx family, which typically
have on resistances of less than 50 .
Similarly, connecting the CFF node to an external multiplexer
or ADG1209 family of multiplexers meet these requirements.
The series resistance of the multiplexer used should be such that
1/(2π × RON × CDUT) > 100 kHz
The voltage range of the CFFx and CCOMPx pins is the same as
the voltage range expected on the FOHx pin; therefore, choice
of capacitor must take this into account.
Table 12. Suggested Compensation Capacitor Selection
CLOAD
CCOMP Capacitor
CFF Capacitor
≤1 nF
100 pF
220 pF
≤10 nF
100 pF
1 nF
≤100 nF
CLOAD/100
CLOAD/10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX8664BEEP+T | IC CNTRLR DUAL OUT 20-QSOP |
| SCRH8D28-100 | INDUCTOR SMD 10UH 2.30A 100KHZ |
| MAX16948AGTE/V+T | IC LDO/SWITCH ADJ DUAL 16TQFN |
| VI-JW2-EZ-S | CONVERTER MOD DC/DC 15V 25W |
| VI-JW1-EZ-S | CONVERTER MOD DC/DC 12V 25W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD5532EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Infinite Sample-and-Hold |
| EVAL-AD5532EBZ | 功能描述:BOARD EVAL FOR AD5532 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5532HSEBZ | 功能描述:BOARD EVAL FOR AD5532HS RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5533EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Precision Infinite Sample-and-Hold |
| EVAL-AD5535BEBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。