參數(shù)資料
型號(hào): EVAL-AD5755-1SDZ
廠商: Analog Devices Inc
文件頁數(shù): 14/52頁
文件大小: 0K
描述: BOARD EVAL FOR AD5755-1
視頻文件: AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 4
位數(shù): 16
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 11µs
DAC 型: 電流/電壓
工作溫度: -40°C ~ 105°C
已供物品:
已用 IC / 零件: *
Data Sheet
AD5755-1
Rev. E | Page 21 of 52
–0.08
–0.07
–0.06
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0.03
T
OT
AL
UNADJS
UT
E
D
E
RRO
R
(
%F
S
R)
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
AVDD = +15V
AVSS = –15V/0V
4mA TO 20mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
0mA TO 24mA INTERNAL RSET
09226-
155
Figure 38. Total Unadjusted Error vs. Temperature
–0.08
–0.07
–0.06
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0.03
F
UL
L
-S
CAL
E
RRO
R
(
%F
S
R)
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
AVDD = +15V
AVSS = –15V/0V
4mA TO 20mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
0mA TO 24mA INTERNAL RSET
09226-
157
Figure 39. Full Scale Error vs. Temperature
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
OFFS
E
T
E
R
OR
(
%
FS
R
)
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
4mA TO 20mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
0mA TO 24mA INTERNAL RSET
AVDD = +15V
AVSS = –15V/0V
09226-
158
Figure 40. Offset Error vs. Temperature
–0.06
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
G
AI
N
E
RRO
R
(
%F
S
R)
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
4mA TO 20mA INTERNAL RSET
4mA TO 20mA EXTERNAL RSET
0mA TO 20mA INTERNAL RSET
0mA TO 20mA EXTERNAL RSET
0mA TO 24mA EXTERNAL RSET
0mA TO 24mA INTERNAL RSET
AVDD = +15V
AVSS = –15V/0V
09226-
159
Figure 41. Gain Error vs. Temperature
–0.0020
–0.0015
–0.0010
–0.0005
0
0.0005
0.0010
0.0015
0.0020
0.0025
10
15
20
25
30
IN
L
E
RRO
R
(
%F
S
R)
SUPPLY (V)
4mA TO 20mA RANGE MAX INL
4mA TO 20mA RANGE MIN INL
TA = 25°C
AVSS = –26.4V FOR AVDD > +26.4V
09226-
056
Figure 42. Integral Nonlinearity Error vs. AVDD/|AVSS|,
Over Supply, External RSET
–0.0020
–0.0025
–0.0015
–0.0010
–0.0005
0
0.0005
0.0010
0.0015
10
15
20
25
30
IN
L
E
RRO
R
(
%F
S
R)
SUPPLY (V)
4mA TO 20mA RANGE MAX INL
4mA TO 20mA RANGE MIN INL
TA = 25°C
AVSS = –26.4V FOR AVDD > +26.4V
09226-
057
Figure 43. Integral Nonlinearity Error vs. AVDD/|AVSS|,
Over Supply, Internal RSET
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