參數(shù)資料
型號(hào)： EVAL-AD5755-1SDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 39/52頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD5755-1
視頻文件： AD5755: 16-Bit Multi-Channel, Voltage and Current Output DAC
標(biāo)準(zhǔn)包裝： 1
DAC 的數(shù)量： 4
位數(shù)： 16
數(shù)據(jù)接口： 串行
設(shè)置時(shí)間： 11µs
DAC 型： 電流/電壓
工作溫度： -40°C ~ 105°C
已供物品： 板
已用 IC / 零件： *
AD5755-1
Data Sheet
Rev. E | Page 44 of 52
current and small load resistor), the dc-to-dc converter enters a
pulse-skipping mode to minimize switching power dissipation.
DC-to-DC Converter Inductor Selection
For typical 4 mA to 20 mA applications, a 10 H inductor (such
as the XAL4040-103 from Coilcraft), combined with a switch-
ing frequency of 410 kHz, allows up to 24 mA to be driven into a
load resistance of up to 1 k with an AVCC supply of 4.5 V to
5.5 V. It is important to ensure that the inductor is able to
handle the peak current without saturating, especially at the
maximum ambient temperature. If the inductor enters into
saturation mode, it results in a decrease in efficiency. The
inductance value also drops during saturation and may result in
the dc-to-dc converter circuit not being able to supply the
required output power.
DC-to-DC Converter External Schottky Selection
The AD5755-1 requires an external Schottky for correct
operation. Ensure that the Schottky is rated to handle the
maximum reverse breakdown expected in operation and that
the rectifier maximum junction temperature is not exceeded.
The diode average current is approximately equal to the ILOAD
current. Diodes with larger forward voltage drops result in a
decrease in efficiency.
DC-to-DC Converter Compensation Capacitors
As the dc-to-dc converter operates in DCM, the uncompensated
transfer function is essentially a single-pole transfer function.
The pole frequency of the transfer function is determined by
the dc-to-dc converter’s output capacitance, input and output
voltage, and output load. The AD5755-1 uses an external capacitor
in conjunction with an internal 150 k resistor to compensate
the regulator loop. Alternatively, an external compensation resistor
can be used in series with the compensation capacitor, by setting
the DC-DC Comp bit in the dc-to-dc control register. In this case,
a ~50 k resistor is recommended. A description of the advantages
of this can be found in the AICC Supply Requirements—Slewing
section. For typical applications, a 10 nF dc-to-dc compensation
capacitor is recommended.
DC-to-DC Converter Input and Output Capacitor
Selection
The output capacitor affects ripple voltage of the dc-to-dc
converter and indirectly limits the maximum slew rate at which
the channel output current can rise. The ripple voltage is caused
by a combination of the capacitance and equivalent series
resistance (ESR) of the capacitor. For the AD5755-1, a ceramic
capacitor of 4.7 F is recommended for typical applications.
Larger capacitors or paralleled capacitors improve the ripple at
the expense of reduced slew rate. Larger capacitors also impact
the AVCC supplies current requirements while slewing (see the
AICC Supply Requirements—Slewing section). This capacitance
at the output of the dc-to-dc converter should be >3 F under
all operating conditions.
The input capacitor provides much of the dynamic current
required for the dc-to-dc converter and should be a low ESR
component. For the AD5755-1, a low ESR tantalum or ceramic
capacitor of 10 F is recommended for typical applications.
Ceramic capacitors must be chosen carefully because they can
exhibit a large sensitivity to dc bias voltages and temperature.
X5R or X7R dielectrics are preferred because these capacitors
remain stable over wider operating voltage and temperature
ranges. Care must be taken if selecting a tantalum capacitor to
ensure a low ESR value.
AICC SUPPLY REQUIREMENTS—STATIC
The dc-to-dc converter is designed to supply a VBOOST_x voltage of
VBOOST = IOUT × RLOAD + Headroom
(2)
See Figure 53 for a plot of headroom supplied vs. output
voltage. This means that, for a fixed load and output voltage,
the dc-to-dc converter output current can be calculated by
the following formula:
CC
V
BOOST
OUT
CC
AV
V
I
AV
Efficiency
Out
Power
AI
BOOST
×
=
×
=
η
(3)
where:
IOUT is the output current from IOUT_x in amps.
ηV
BOOST
is the efficiency at VBOOST_x as a fraction (see Figure 55
AICC SUPPLY REQUIREMENTS—SLEWING
The AICC current requirement while slewing is greater than in
static operation because the output power increases to charge
the output capacitance of the dc-to-dc converter. This transient
current can be quite large (see Figure 82), although the methods
can reduce the requirements on the AVCC supply. If not enough
AICC current can be provided, the AVCC voltage drops. Due to
this AVCC drop, the AICC current required to slew increases
further. This means that the voltage at AVCC drops further (see
Equation 3) and the VBOOST_x voltage, and thus the output voltage,
may never reach its intended value. Because this AVCC voltage is
common to all channels, this may also affect other channels.
0
5
10
15
20
25
30
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
0.5
1.0
1.5
2.0
2.5
I O
UT
_
x
CURRE
NT
(
mA
)/
V
B
OOS
T
_
x
VO
LT
A
G
E
(V)
AI
CC
CURRE
NT
(
A)
TIME (ms)
AICC
IOUT
VBOOST
0mA TO 24mA RANGE
1k LOAD
fSW = 410kHz
INDUCTOR = 10H (XAL4040-103)
TA = 25°C
09226-
184
Figure 82. AICC Current vs. Time for 24 mA Step Through 1 k Load
with Internal Compensation Resistor
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