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參數(shù)資料
| 型號： | EVAL-AD7266EDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7266 A/D CONV |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 2M |
| 數(shù)據(jù)接口： | SPI?、QSPI?、MICROWIRE? 和 DSP |
| 輸入范圍： | 0 ~ 5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 9mW @ 3V，27mW @ 5V |
| 工作溫度： | -40°C ~ 125°C |
| 已用 IC / 零件： | AD7266 |
| 已供物品： | 板 |
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AD7266
Rev. B | Page 14 of 28
VDD
C1
D
VIN+
R1 C2
VDD
C1
D
VIN–
R1 C2
04603-015
Figure 18. Equivalent Analog Input Circuit,
Conversion Phase—Switches Open, Track Phase—Switches Closed
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum source
impedance depends on the amount of THD that can be toler-
ated. The THD increases as the source impedance increases and
performance degrades. Figure 19 shows a graph of the THD vs.
the analog input signal frequency for different source impedances
in single-ended mode, while Figure 20 shows the THD vs. the
analog input signal frequency for different source impedances
in differential mode.
04
60
3-
0
16
INPUT FREQUENCY (kHz)
600
0
200
100
400
300
500
T
HD
(
d
B)
–50
–60
–55
–65
–70
–75
–80
–85
–90
FSAMPLE = 1.5MSPS
VDD = 3V
RANGE = 0V TO VREF
RSOURCE = 300
RSOURCE = 0
RSOURCE = 10
RSOURCE = 47
RSOURCE = 100
Figure 19. THD vs. Analog Input Frequency for Various
Source Impedances, Single-Ended Mode
04
60
3-
01
7
INPUT FREQUENCY (kHz)
600
700
800
900 1000
0
200
100
400
300
500
TH
D
(
d
B
)
–60
–65
–70
–75
–80
–85
–90
FSAMPLE = 1.5MSPS
VDD = 3V
RANGE = 0V TO VREF
RSOURCE = 300
RSOURCE = 0
RSOURCE = 10
RSOURCE = 47
RSOURCE = 100
Figure 20. THD vs. Analog Input Frequency for
Various Source Impedances, Differential Mode
Figure 21 shows a graph of the THD vs. the analog input
frequency for various supplies while sampling at 2 MSPS. In this
case, the source impedance is 47 Ω.
04603-018
INPUT FREQUENCY (kHz)
600
700
800
900 1000
0
200
100
400
300
500
THD
(dB)
–50
–60
–55
–65
–70
–75
–80
–85
–90
VDD = 3V
SINGLE-ENDED MODE
VDD = 5V
SINGLE-ENDED MODE
VDD = 3V
DIFFERENTIAL MODE
VDD = 5V
DIFFERENTIAL MODE
FSAMPLE = 1.5MSPS/2MSPS
VDD = 3V/5V
RANGE = 0 TO VREF
Figure 21. THD vs. Analog Input Frequency for Various Supply Voltages
ANALOG INPUTS
The AD7266 has a total of 12 analog inputs. Each on-board
ADC has six analog inputs that can be configured as six single-
ended channels, three pseudo differential channels, or three
fully differential channels. These may be selected as described
in the Analog Input Selection section.
Single-Ended Mode
The AD7266 can have a total of 12 single-ended analog input
channels. In applications where the signal source has high
impedance, it is recommended to buffer the analog input
before applying it to the ADC. The analog input range can be
programmed to be either 0 to VREF or 0 to 2 × VREF.
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias up this
signal to make it correctly formatted for the ADC. Figure 22
shows a typical connection diagram when operating the ADC
in single-ended mode.
VIN
0V
+1.25V
–1.25V
DCAPA/DCAPB
VA1
AD72661
VB6
R
3R
R
0V
+2.5V
0.47F
1ADDITIONAL PINS OMITTED FOR CLARITY.
04
603
-01
9
Figure 22. Single-Ended Mode Connection Diagram
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