參數(shù)資料
型號: EVAL-AD7732EBZ
廠商: Analog Devices Inc
文件頁數(shù): 3/32頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD7732
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 15.4k
數(shù)據(jù)接口: 串行
輸入范圍: ±10 V
在以下條件下的電源(標(biāo)準(zhǔn)): 85mW @ 3V
工作溫度: -40°C ~ 105°C
已用 IC / 零件: AD7732
已供物品: 板,纜線,CD
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AD7732
Rev. A | Page 11 of 32
Chopping Disabled
The second mode, in which the AD7732 is configured with
chopping disabled (CHOP = 0), provides faster conversion time
while still maintaining high resolution. Table 7 to Table 9 show
the –3 dB frequencies and typical performance versus the
channel conversion time and equivalent output data rate,
respectively. Table 7 shows the typical output rms noise. Table 8
shows the typical effective resolution based on the rms noise.
Table 9 shows the typical output peak-to-peak resolution,
representing values for which there will be no code flicker
within a 6-sigma limit. The peak-to-peak resolutions are not
calculated based on rms noise but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
Table 7. Typical Output RMS Noise in μV vs. Conversion Time and Input Range with Chopping Disabled
FW
Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
RMS Noise
(μV)
127
7Fh
1357
737
670
13.2
92
5Ch
992
1008
920
15.5
44
2Ch
492
2032
1850
22.7
35
23h
398
2511
2290
26.3
16
10h
200
4991
2500
39.0
8
08h
117
8545
7780
57.0
3
03h
65
15398
14000
132
Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
Input Range/Effective Resolution (Bits)
FW
Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
0 V to +10 V
±5 V
0 V to +5 V
127
7Fh
1357
737
670
20.5
19.5
18.5
92
5Ch
992
1008
920
20.3
19.3
18.3
44
2Ch
492
2032
1850
19.7
18.7
17.7
35
23h
398
2511
2290
19.5
18.5
17.5
16
10h
200
4991
2500
19.0
18.0
17.0
8
08h
117
8545
7780
18.4
17.4
16.4
3
03h
65
15398
14000
17.2
16.2
15.2
Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
Input Range/Peak-to-Peak Resolution (Bits)
FW
Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
±10 V
0 V to +10 V
±5 V
0 V to +5 V
127
7Fh
1357
737
670
17.6
16.6
15.6
92
5Ch
992
1008
920
17.4
16.4
15.4
44
2Ch
492
2032
1850
16.8
15.8
14.8
35
23h
398
2511
2290
16.6
15.6
14.6
16
10h
200
4991
2500
16.1
15.1
14.1
8
08h
117
8545
7780
15.5
14.5
13.5
3
03h
65
15398
14000
14.3
13.3
12.3
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