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參數(shù)資料
| 型號(hào)： | EVAL-AD7732EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7732 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 15.4k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±10 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 85mW @ 3V |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7732 |
| 已供物品： | 板，纜線，CD |
| 相關(guān)產(chǎn)品： | AD7732BRUZ-REEL7-ND - IC ADC 24BIT 2CH SIG-DEL 28TSSOP AD7732BRUZ-REEL-ND - IC ADC 24BIT 2CH SIG-DEL 28TSSOP AD7732BRUZ-ND - IC ADC 24BIT 2-CH 28-TSSOP AD7732BRU-ND - IC ADC 24BIT 2-CH 28-TSSOP |
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AD7732
Rev. A | Page 13 of 32
Pin No.
Mnemonic
Description
8
SYNC/P1
SYNC/Digital Input/Digital Output. The pin direction is determined by the P1 DIR bit;
the digital value can be read/written as the P1 bit in the I/O port register. When the
SYNC bit in the I/O port register is set to 1, the SYNC/P1 pin can be used to synchronize
the AD7732 modulator and digital filter with other devices in the system. The digital
voltage is referenced to analog supplies. When configured as an input, the pin should be
tied high or low.
9
RA
RA, in association with RB and BIAS0(+), can be used to level shift the positive analog
input 0. In normal circuit configuration, this pin is left open circuit.
10
RB
RB, in association with RA and BIAS0(+), can be used to level shift the positive analog
input 0. In normal circuit configuration, this pin is left open circuit.
11
BIAS1(+)
This input is used to level shift the positive analog input 1. This signal is used to ensure
that the differential signal seen by the internal buffer amplifier is within its common-
mode range. BIAS pins will normally be connected to 2.5 V.
12
AIN1(+)
Positive Analog Input Channel 1.
13
AIN0(+)
Positive Analog Input Channel 0.
14
BIAS0(+)
Voltage Bias for Positive Analog Input 0. This pin has the same function as BIAS1(+).
15
BIAS0(–)
Voltage Bias for Negative Analog Input 0. This pin has the same function as BIAS1(+).
16
AIN0(–)
Negative Analog Input Channel 0.
17
AIN1(–)
Negative Analog Input Channel 1.
18
BIAS1(–)
Voltage Bias for Negative Analog Input 1. This pin has the same function as BIAS1(+).
19
RC
RC, in association with RD and BIAS0(–), can be used to level shift the negative analog
input 0. In normal circuit configuration, this pin is left open circuit.
20
RD
RD, in association with RC and BIAS0(–), can be used to level shift the negative analog
input 0. In normal circuit configuration, this pin is left open circuit.
21
REFIN(+)
Positive Terminal of the Differential Reference Input. REFIN(+) voltage potential can lie
anywhere between AVDD and AGND. In normal circuit configuration, this pin should be
connected to a 2.5 V reference voltage.
22
REFIN(–)
Negative Terminal of the Differential Reference Input. REFIN(–) voltage potential can lie
anywhere between AVDD and AGND. In normal circuit configuration, this pin should be
connected to a 0 V reference voltage.
23
AGND
Ground Reference Point for Analog Circuitry.
24
RDY
Logic Output. Used as a status output in both conversion mode and calibration mode. In
conversion mode, a falling edge on this output indicates that either any channel or all
channels have unread data available, according to the RDYFN bit in the I/O port register.
In calibration mode, a falling edge on this output indicates that calibration is complete
(see the Digital Interface Description section for more details).
25
DOUT
Serial data output with serial data being read from the output shift register on the part.
This output shift register can contain information from any AD7732 register, depending
on the address bits of the communications register.
26
DIN
Serial data input (Schmitt triggered) with serial data being written to the input shift
register on the part. Data from this input shift register is transferred to any AD7732
register, depending on the address bits of the communications register.
27
DVDD
Digital Supply Voltage, 3 V or 5 V Nominal.
28
DGND
Ground Reference Point for Digital Circuitry.
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