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參數(shù)資料
| 型號： | EVAL-AD7738EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/28頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD7738 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 15.4k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±2.5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 85mW @ 5V |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7738 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7738BRUZ-REEL7-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP AD7738BRUZ-REEL-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP AD7738BRUZ-ND - IC ADC 24BIT 8-CH 28-TSSOP AD7738BRU-REEL7-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP AD7738BRU-ND - IC ADC 24BIT 8-CH 28-TSSOP |
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REV. 0
–18–
AD7738
Mode Register
8 Bits Read/Write Register, Address 38h–3Fh, Default Value 00h
The Mode register configures the part and determines the part’s operating mode. Writing to the Mode register will clear the ADC
Status register, set the
RDY pin to logic high level, exit all current operations, and start the mode specified by the Mode bits.
The AD7738 contains only one Mode register. The three LSBs of the address used for writing to the Mode register specify the channel
selected for operation determined by the MD2 to MD0 bits. The address 38h only must be used for reading from the Mode register.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
MD2
MD1
MD0
CLKDIS
DUMP
CONT RD
24/16 BIT
CLAMP
Default
0
Bit
Mnemonic
Description
7–5
MD2–MD0
Mode Bits. These three bits determine the AD7738 operation mode. Writing a new value to the Mode
bits will exit the part from the mode in which it has been operating and place it in the new requested
mode immediately. The function of the Mode bits is described in more detail below.
4
CLKDIS
Master Clock Output Disable. When this bit is set to 1 the master clock is disabled from appearing
at the MCLKOUT pin and the MCLKOUT pin is in a high impedance state. This allows turning off the
MCLKOUT as a power saving feature. When using an external clock on MCLKIN, the AD7738
continues to have internal clocks and will convert normally regardless of CLKDIS bit state. When using
a crystal oscillator or ceramic resonator across the MCLKIN and MCLKOUT pins, the AD7738 clock is
stopped and no conversions can take place when the CLKDIS bit is active. The AD7738 digital interface
can still be accessed using the SCLK pin.
3
DUMP
DUMP Mode. When this bit is reset to 0, the Channel Status register and Channel Data register will
be addressed and read separately. When the DUMP bit is set to 1, the Channel Status register will be followed
immediately by a read of the Channel Data register regardless of whether the Status or Data register
has been addressed through the Communication register. The Continuous Read mode will always be a
“Dump Mode” reading of the Channel Status and Data register regardless of the Dump Bit value. See the
Digital Interface Description section for more details.
2
CONT RD
When this bit is set to 1, the AD7738 will operate in the Continuous Read mode. See the Digital
Interface Description section for more details.
1
24/16 BIT
The Channel Data Register Data Width Selection Bit. When set to 1, the Channel Data registers will be
24 bits wide. When set to 0, then the Channel Data registers will be 16 bits wide.
0
CLAMP
This bit determines the Channel Data register’s value when the analog input voltage is outside the nominal
input voltage range. When the CLAMP bit is set to 1, the Channel Data register will be digitally clamped
either to all zeros or all ones when the analog input voltage goes outside the nominal input voltage range.
When the CLAMP bit is reset to 0, the Data registers reflect the analog input voltage even outside the
nominal voltage range. See the Analog Inputs Extended Voltage Range section.
MD2
MD1
MD0
Mode
Address Used for Mode Register Write Specify
000
Idle Mode
001Continuous Conversion Mode
The First Channel to Start Converting
010
Single Conversion Mode
Channel to Convert
011Power Down (Standby) Mode
100
ADC Zero-Scale Self Calibration
Channel Conversion Time Used for the ADC Self-Calibration
101For Future Use
110Channel Zero-Scale System Calibration
Channel to Calibrate
111Channel Full-Scale System Calibration
Channel to Calibrate
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7739EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-AD7739EBZ | 功能描述:BOARD EVAL FOR AD7739 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7741/42EB | 制造商:Analog Devices 功能描述:Evaluation Board For Single And Multi-Channel Synchronous Voltage-To-Frequency Converters 制造商:Analog Devices 功能描述:EVALUATION BOARD IC - Bulk |
| EVAL-AD7741/42EBZ | 功能描述:BOARD EVAL FOR AD7741/7742 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| EVAL-AD7741-42EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Single and Multichannel, Synchronous Voltage-to-Frequency Converters |
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