參數(shù)資料
型號(hào)： EVAL-AD7738EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 14/28頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD7738
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 24
采樣率（每秒）： 15.4k
數(shù)據(jù)接口： 串行
輸入范圍： ±2.5 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 85mW @ 5V
工作溫度： -40°C ~ 105°C
已用 IC / 零件： AD7738
已供物品： 板
相關(guān)產(chǎn)品： AD7738BRUZ-REEL7-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP
AD7738BRUZ-REEL-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP
AD7738BRUZ-ND - IC ADC 24BIT 8-CH 28-TSSOP
AD7738BRU-REEL7-ND - IC ADC 24BIT 8CH SIG-DEL 28TSSOP
AD7738BRU-ND - IC ADC 24BIT 8-CH 28-TSSOP
REV. 0
AD7738
–21–
Single Conversion and Reading Data
When the Mode register is being written, the ADC Status Byte
is cleared and the
RDY pin goes high regardless of its previous
state. When the single conversion command is written to the
Mode register, the ADC starts the conversion on the channel
selected by the address of the Mode register. After the conversion
is completed, the Data register is updated, the Mode register is
changed to Idle mode, the relevant RDY bit is set, and the
RDY
pin goes low. The RDY bit is reset and the
RDY pin returns
high when the relevant Channel Data register is being read.
Figure 7 shows the digital interface signals executing a single
conversion on Channel 0, waiting for the
RDY pin low, and
reading the Channel 0 Data register.
Dump Mode
When the DUMP bit in the Mode register is set to 1, the Chan-
nel Status register will be read immediately by a read of the
Channel Data register regardless of whether the Status or the
Data register has been addressed through the Communication
register. The DIN pin should not be high while reading 24-bit
data in Dump mode. Otherwise the AD7738 will be reset.
Figure 8 shows the digital interface signals executing a single
conversion on Channel 0, waiting for for the
RDY pin low, and
reading the Channel 0 Status register and Data register in the
Dump mode.
DIN
SCLK
CS
DOUT
WRITE
COMMUNICATIONS
REGISTER
WRITE
MODE
REGISTER
RDY
CONVERSION
TIME
READ DATA
REGISTER
38h
40h
48h
(00h)
DATA
WRITE
COMMUNICATIONS
REGISTER
Figure 7. Serial Interface Signals—Single Conversion Command and 16-Bit Data Reading
DIN
SCLK
CS
DOUT
WRITE
COMMUNICATIONS
REGISTER
WRITE
MODE
REGISTER
RDY
CONVERSION
TIME
READ DATA
REGISTER
38h
48h
(00h)
CH. STAT
DATA
WRITE
COMMUNICATIONS
REGISTER
READ
CHANNEL
STATUS
DATA
(00h)
Figure 8. Serial Interface Signals—Single Conversion Command, 16-Bit Data Reading, Dump Mode
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