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參數(shù)資料
| 型號： | EVAL-AD7785EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/32頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7785 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 20 |
| 采樣率（每秒）： | 470 |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±VREF |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | AD7785 |
| 已供物品： | 板，纜線，CD |
| 相關(guān)產(chǎn)品： | AD7785BRUZ-REEL-ND - IC ADC 20BIT 3CH LN LP 16-TSSOP AD7785BRUZ-ND - IC ADC 20BIT SIGMA-DELTA 16TSSOP |
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AD7785
Rev. 0 | Page 10 of 32
Pin No.
Mnemonic
Description
15
DOUT/RDY
Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output
pin to access the output shift register of the ADC. The output shift register can contain data from any of the
on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate
the completion of a conversion. If the data is not read after the conversion, the pin goes high before the
next update occurs.
The DOUT/RDY falling edge can be used as an interrupt to a processor, indicating that valid data is available.
With an external serial clock, the data can be read using the DOUT/RDY pin. With CS low, the data/control
word information is placed on the DOUT/RDY pin on the SCLK falling edge and is valid on the SCLK
rising edge.
16
DIN
Serial Data Input. This serial data input is to the input shift register on the ADC. Data in this shift register is
transferred to the control registers within the ADC; the register selection bits of the communications
register identify the appropriate register.
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