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| 型號(hào)： | EVAL-AD7879-1EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 22/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7879-1 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，觸摸屏控制器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD7879-1 |
| 主要屬性： | 4 線電阻式觸控屏控制器，I²C 和 SPI 接口 |
| 次要屬性： | 圖形用戶界面，USB 接口 |
| 已供物品： | 板，線纜，CD，觸控屏 |
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AD7879/AD7889
Rev. C | Page 28 of 40
PM1
PM0
GPIO
EN
GPIO
DAT
GPIO
DIR
GPIO
POL
AVG1 AVG0 MED1 MED0
SW/
RST
FCD3
FCD2
FCD1 FCD0
07667-
030
0
15
SER/
DFR
Figure 31. Control Register 2
CONTROL REGISTER 2
Control Register 2 (Address 0x02) contains the ADC power
management bits, the GPIO settings, the SER/DFR bit (to
choose the single-ended or differential method of touch screen
measurement), the averaging and median filter settings, a bit
that allows resetting of the part, and the first conversion delay
bits. Its power-on default value is 0x4040. See the Detailed
Register Descriptions section for more information about the
control registers.
For information about the averaging and median filter settings,
see the Median and Averaging Filters section. For information
about the GPIO settings, see the GPIO section.
First Conversion Delay (Control Register 2, Bits[3:0])
The first conversion delay (FCD) bits in Control Register 2
program a delay from 128 s (default) up to 4.096 ms before
the first conversion to allow the ADC time to power up. This
delay also occurs before conversion of the X and Y coordinate
channels to allow extra time for screen settling, and after the
last conversion in a sequence to precharge PENIRQ.
Table 22. First Conversion Delay Selection
FCD[3:0]
Delay
0000
128 s
0001
256 s
0010
384 s
0011
512 s
0100
640 s
0101
768 s
0110
896 s
0111
1.024 ms
1000
1.152 ms
1001
1.280 ms
1010
1.536 ms
1011
1.792 ms
1100
2.048 ms
1101
2.560 ms
1110
3.584 ms
1111
4.096 ms
Power Management (Control Register 2, Bits[15:14])
The power management (PM) bits in Control Register 2 allow
the power management features of the ADC to be programmed
(see Table 23). If the PM bits are set to 00, the ADC is in full
shutdown. This setting overrides any setting of the mode bits in
Control Register 1. Power management overrides the ADC modes.
Table 23. Power Management Selection
PM1
PM0
Function
0
Full shutdown; ADC, oscillator, bias, and temp-
erature sensor are turned off. The only way to
exit this mode is to write to the part over the
serial interface and change the PM bits. This
setting overrides any other setting on the
part, including the ADC mode bits.
0
1
The analog blocks to be powered down
depend on the ADC mode setting. In master
mode, the ADC, bias, temperature sensor, and
oscillator are powered down and must wake
up when the user touches the screen. In slave
mode, the ADC and temperature sensor are
powered down when not being used. They
wake up automatically when required. The
oscillator and bias are powered up because
they are needed to measure time. This setting
also applies to the single-conversion mode.
1
0
The ADC, bias, and oscillator are powered up
continuously, irrespective of ADC mode.
1
Same as 01.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7879EBZ | 功能描述:BOARD EVALUATION FOR AD7879 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| EVAL-AD7887CB | 制造商:Analog Devices 功能描述:EVAL BD FOR 2.7 V TO 5.25 V, MICROPWR, 2CH, 125 KSPS, 12-BIT - Bulk |
| EVAL-AD7887CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.7 V to 5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead MSOP |
| EVAL-AD7887CBZ | 功能描述:BOARD EVAL FOR AD7887 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:* 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7888CB | 制造商:Analog Devices 功能描述:EVAL KIT FOR 2.7 V TO 5.25 V, MICROPWR, 8CH, 125 KSPS, 12-BI - Bulk |
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