參數(shù)資料
型號(hào)： EVAL-AD9837SDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 4/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9837
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，直接數(shù)字合成（DDS）
嵌入式： 否
已用 IC / 零件： AD9837
次要屬性： 圖形用戶界面
已供物品： 板，CD，文檔
AD9837
Data Sheet
Rev. A | Page 12 of 28
CIRCUIT DESCRIPTION
The AD9837 is a fully integrated direct digital synthesis (DDS)
chip. The chip requires a reference clock and decoupling capa-
citors to provide digitally created sine waves up to 8 MHz. In
addition to the generation of this RF signal, the chip is fully
capable of a broad range of simple and complex modulation
schemes. These modulation schemes are fully implemented in
the digital domain, allowing accurate and simple realization
of complex modulation algorithms using DSP techniques.
The internal circuitry of the AD9837 consists of the following
main sections: a numerically controlled oscillator (NCO),
frequency and phase modulators, SIN ROM, a digital-to-analog
converter, and a regulator.
NUMERICALLY CONTROLLED OSCILLATOR PLUS
PHASE MODULATOR
The AD9837 consists of two frequency select registers, a phase
accumulator, two phase offset registers, and a phase offset adder.
The main component of the NCO is a 28-bit phase accumulator.
Continuous time signals have a phase range of 0 to 2π. Outside
this range of numbers, the sinusoid functions repeat themselves
in a periodic manner. The digital implementation is no different.
The accumulator simply scales the range of phase numbers into
a multibit digital word. The phase accumulator in the AD9837
is implemented with 28 bits. Therefore, in the AD9837, 2π = 228.
Likewise, the ΔPhase term is scaled into this range of numbers:
0 < ΔPhase < 228 1
With these substitutions, Equation 3 becomes
f = ΔPhase × fMCLK∕228
(4)
where 0 < ΔPhase < 228 1.
The input to the phase accumulator can be selected from either
the FREQ0 register or the FREQ1 register and is controlled by
the FSEL bit in the control register. NCOs inherently generate
continuous phase signals, thus avoiding any output discontinuity
when switching between frequencies.
Following the NCO, a phase offset can be added to perform phase
modulation using the 12-bit phase registers. The contents of one
of these phase registers is added to the MSBs of the NCO. The
AD9837 has two phase registers; their resolution is 2π/4096.
SIN ROM
To make the output from the NCO useful, it must be converted
from phase information into a sinusoidal value. Because phase
information maps directly to amplitude, the SIN ROM uses the
digital phase information as an address to a lookup table and
converts the phase information into amplitude.
Although the NCO contains a 28-bit phase accumulator, the out-
put of the NCO is truncated to 12 bits. Using the full resolution
of the phase accumulator is impractical and unnecessary because
a lookup table of 228 entries would be required. It is only necessary
to have sufficient phase resolution such that the errors due to
truncation are smaller than the resolution of the 10-bit DAC.
Therefore, the SIN ROM must have two bits of phase resolution
more than the 10-bit DAC.
The SIN ROM is enabled using the MODE bit (Bit D1) in the
control register (see Table 16).
DIGITAL-TO-ANALOG CONVERTER (DAC)
The AD9837 includes a high impedance, current source, 10-bit
DAC. The DAC receives the digital words from the SIN ROM
and converts them into the corresponding analog voltages.
The DAC is configured for single-ended operation. An external
load resistor is not required because the device has an on-board
200 resistor. The DAC generates an output voltage of 0.6 V p-p
typical.
REGULATOR
VDD provides the power supply required for the analog section
and the digital section of the AD9837. This supply can have a
value of 2.3 V to 5.5 V.
The internal digital section of the AD9837 is operated at 2.5 V.
An on-board regulator steps down the voltage applied at VDD
to 2.5 V. When the applied voltage at the VDD pin of the AD9837
is less than or equal to 2.7 V, the CAP/2.5V and VDD pins should
be tied together to bypass the on-board regulator.
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