參數(shù)資料
型號(hào): EVAL-ADUC7024QSZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 23/104頁(yè)
文件大?。?/td> 0K
描述: KIT DEV QUICK START ADUC7024
產(chǎn)品培訓(xùn)模塊: ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
設(shè)計(jì)資源: ADUC7024 Dev System Schematic/Brd Outline
7024 Gerber Files
標(biāo)準(zhǔn)包裝: 1
系列: QuickStart™ 套件
類(lèi)型: MCU
適用于相關(guān)產(chǎn)品: ADuC7024
所含物品: 評(píng)估板、電源、纜線、軟件和說(shuō)明文檔
Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 25 of 104
ADuC7024/ADuC7025
04955-
067
1
ADC4
2
ADC5
3
ADC6
4
ADC7
5
ADC8
6
ADC9
7
GNDREF
8
ADCNEG
9
DAC0/ADC12
10
DAC1/ADC13
11
TMS
12
TDI
13
P4.6/PLAO[14]
14
P4.7/PLAO[15]
15
BM/P0.0/CMPOUT/PLAI[7]
16
P0.6/T1/MRST/PLAO[3]
48 P1.2/SPM2/PLAI[2]
47 P1.3/SPM3/PLAI[3]
46 P1.4/SPM4/PLAI[4]/IRQ2
45 P1.5/SPM5/PLAI[5]/IRQ3
44 P4.1/PLAO[9]
43 P4.0/PLAO[8]
42 IOVDD
41 IOGND
40 P1.6/SPM6/PLAI[6]
39 P1.7/SPM7/PLAO[0]
38 P3.7/PWMSYNC/PLAI[15]
37 P3.6/PWMTRIP/PLAI[14]
36 XCLKI
35 XCLKO
34 P0.7/ECLK/XCLK/SPM8/PLAO[4]
33 P2.0/SPM9/PLAO[5]/CONVSTART
64
ADC3
/CM
P
1
63
ADC2
/CM
P
0
62
ADC1
61
ADC0
60
DACV
DD
59
AV
DD
58
AG
ND
57
DACG
ND
56
DAC
R
E
F
55
V
R
E
F
54
P
4.
5/
P
L
A
O
[13]
53
P
4.
4/
P
L
A
O
[12]
52
P
4.
3/
P
L
A
O
[11]
51
P
4.
2/
P
L
A
O
[10]
50
P
1.
0/
T
1/
S
P
M
0/
P
L
A
I[
0]
49
P1
.1
/SPM
1
/PL
A
I[
1
]
TOP VIEW
(Not to Scale)
ADuC7024/
ADuC7025
PIN 1
INDICATOR
17
T
CK
18
T
DO
19
IOGN
D
20
IOV
DD
21
LV
DD
22
DG
ND
23
P3
.0
/PW
M
0
H
/P
L
A
I[
8
]
24
P3
.1
/PW
M
0
L
/P
L
A
I[
9
]
25
P3
.2
/PW
M
1
H
/P
L
A
I[
10]
26
P3
.3
/PW
M
1
L
/P
L
A
I[
11]
27
P
0
.3
/T
RS
T
/ADC
BUS
Y
28
RS
T
29
P3
.4
/PW
M
2
H
/P
L
A
I[
12]
30
P3
.5
/PW
M
2
L
/P
L
A
I[
13]
31
IR
Q0
/P
0
.4
/P
W
M
T
R
IP
/P
L
A
O[
1
]
32
IR
Q1
/P
0
.5
/A
D
C
BUS
Y
/P
L
A
O[
2
]
NOTES
1. THE EXPOSED PAD MUST BE SOLDERED FOR MECHANICAL PURPOSES AND LEFT UNCONNECTED.
Figure 23. 64-Lead LFCSP_VQ Pin Configuration (ADuC7024/ADuC7025)
04955-
068
1
ADC4
2
ADC5
3
ADC6
4
ADC7
5
ADC8
6
ADC9
7
GNDREF
8
ADCNEG
9
DAC0/ADC12
10
DAC1/ADC13
11
TMS
12
TDI
13
P4.6/PLAO[14]
14
P4.7/PLAO[15]
15
BM/P0.0/CMPOUT/PLAI[7]
16
P0.6/T1/MRST/PLAO[3]
48 P1.2/SPM2/PLAI[2]
47 P1.3/SPM3/PLAI[3]
46 P1.4/SPM4/PLAI[4]/IRQ2
45 P1.5/SPM5/PLAI[5]/IRQ3
44 P4.1/PLAO[9]
43 P4.0/PLAO[8]
42 IOVDD
41 IOGND
40 P1.6/SPM6/PLAI[6]
39 P1.7/SPM7/PLAO[0]
38 P3.7/PWMSYNC/PLAI[15]
37 P3.6/PWMTRIP/PLAI[14]
36 XCLKI
35 XCLKO
34 P0.7/ECLK/XCLK/SPM8/PLAO[4]
33 P2.0/SPM9/PLAO[5]/CONVSTART
17
T
CK
18
T
DO
19
IOGN
D
20
IOV
DD
21
LV
DD
22
DG
ND
23
P3
.0
/PW
M
0
H
/P
L
A
I[
8
]
24
P3
.1
/PW
M
0
L
/P
L
A
I[
9
]
25
P3
.2
/PW
M
1
H
/P
L
A
I[
10]
26
P3
.3
/PW
M
1
L
/P
L
A
I[
11]
27
P
0
.3
/T
RS
T
/ADC
BUS
Y
28
RS
T
29
P3
.4
/PW
M
2
H
/P
L
A
I[
12]
30
P3
.5
/PW
M
2
L
/P
L
A
I[
13]
31
IR
Q0
/P
0
.4
/P
W
M
T
R
IP
/P
L
A
O[
1
]
32
IR
Q1
/P
0
.5
/A
D
C
BUS
Y
/P
L
A
O[
2
]
64
ADC3
/CM
P
1
63
ADC2
/CM
P
0
62
ADC1
61
ADC0
60
DACV
DD
59
AV
DD
58
AG
ND
57
DACG
ND
56
DAC
R
E
F
55
V
R
E
F
54
P
4.
5/
P
L
A
O
[13]
53
P
4.
4/
P
L
A
O
[12]
52
P
4.
3/
P
L
A
O
[11]
51
P
4.
2/
P
L
A
O
[10]
50
P
1.
0/
T
1/
S
P
M
0/
P
L
A
I[
0]
49
P1
.1
/SPM
1
/PL
A
I[
1
]
TOP VIEW
(Not to Scale)
ADuC7024/
ADuC7025
PIN 1
INDICATOR
Figure 24. 64-Lead LQFP Pin Configuration (ADuC7024/ADuC7025)
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