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參數資料
| 型號： | FLEX10K |
| 廠商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family |
| 中文描述： | 嵌入式可編程邏輯系列 |
| 文件頁數： | 37/114頁 |
| 文件大小： | 1422K |
| 代理商： | FLEX10K |
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Altera Corporation
37
FLEX 10K Embedded Programmable Logic Family Data Sheet
IEEE 1149.1
(JTAG)
Boundary-Scan
Support
All FLEX 10K devices provide JTAG BST circuitry that comply with the
IEEE Std. 1149.1-1990 specification. All FLEX 10K devices can also be
configured using the JTAG pins through the BitBlaster serial download
cable, ByteBlaster parallel port download cable, ByteBlasterMV parallel
port download cable, or via hardware that uses the Jam
a
programming
and test language. JTAG BST can be performed before or after
configuration, but not during configuration. FLEX 10K devices support
the JTAG instructions shown in Table 12.
Table 11. Supply Voltages & MultiVolt I/O Support Levels
Device Family
Supply Voltage (V)
MultiVolt I/O Support Levels (V)
V
CCINT
5.0
5.0
3.3
3.3
3.3
3.3
2.5
2.5
V
CCIO
5.0
3.3
3.3
3.3
3.3
2.5
3.3
2.5
Input
Output
FLEX 10K
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
2.5, 3.3, or 5.0
2.5, 3.3, or 5.0
2.5, 3.3, or 5.0
2.5, 3.3, or 5.0
5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
3.3 or 5.0
2.5
3.3 or 5.0
2.5
EPF10K50V
EPF10K130V
FLEX 10KA
FLEX 10KE (including
the EPF10K100B
device)
Table 12. FLEX 10K JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
Places the 1-bit bypass register between the
TDI
and
TDO
pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation.
Selects the user electronic signature (UESCODE) register and places it between the
TDI
and
TDO
pins, allowing the UESCODE to be serially shifted out of
TDO
.
Selects the IDCODE register and places it between
TDI
and
TDO
, allowing the IDCODE
to be serially shifted out of
TDO
.
These instructions are used when configuring a FLEX 10K device via JTAG ports with a
BitBlaster, ByteBlaster, or ByteBlasterMV download cable, or using a Jam File (
.jam
) via
an embedded processor.
EXTEST
BYPASS
UESCODE
IDCODE
ICR Instructions
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相關代理商/技術參數 |
參數描述 |
|---|---|
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| FLEX10KA | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Family |
| FLEX10KE | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Embedded Programmable Logic Device |
| FLEX110 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Multibus Pack RoHS:否 制造商:Microchip Technology 產品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
| FLEX111 | 功能描述:開發(fā)板和工具包 - PIC / DSPIC Fasttrack suite RoHS:否 制造商:Microchip Technology 產品:Starter Kits 工具用于評估:chipKIT 核心:Uno32 接口類型: 工作電源電壓: |
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