![](http://datasheet.mmic.net.cn/370000/FS6261-01_datasheet_16690027/FS6261-01_3.png)
XT
January 2000
1.31.00
3
)6
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,62
Table 3: Actual Clock Frequencies
Note: Spread spectrum disabled
CLOCK
TARGET (MHz)
ACTUAL (MHz)
DEVIATION (ppm)
16.67 (with CPU = 133.3)
16.6634
-195.92
APIC_0:2
16.67 (with CPU = 100.0)
16.6661
-36.657
133.33
133.3072
-195.92
CPU_0:3
100.00
99.9963
-36.657
66.67
66.6536
-195.92
CPU/2_0:1
50.00
49.9982
-36.657
33.33 (with CPU = 133.3)
33.3268
-195.92
PCI_1:7, PCI_F
33.33 (with CPU = 100.0)
33.3321
-36.657
66.67 (with CPU = 133.3)
66.6536
-195.92
CK66_0:3
66.67 (with CPU = 100.0)
66.6642
-36.657
CK48
(1)
48
48.0080
+167
(1) 48MHz USB clock is required to be 167ppm off from 48.000MHz to conform to USB requirements.
3.0 Programming Information
Table 4: Function/Clock Enable Configuration
CONTROL INPUTS
CLOCK OUTPUTS (MHz)
SEL_
133/100#
SEL_1
SEL_0
PWR_
DWN#
CPU_
STOP#
PCI_
STOP#
REF_0:1 CPU_0:3
CPU/2_
0:1
PCI_F
PCI_1:7
APIC_
0:2
CK48
CK66_
0:3
0
0
0
1
X
X
tristate
tristate
tristate
tristate
tristate
tristate
tristate
tristate
0
0
1
1
1
1
(reserved) (reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
0
1
0
1
1
1
14.318
100
50
33.33
33.33
16.67
tristate
66.67
0
1
1
1
1
1
14.318
100
50
33.33
33.33
16.67
48
66.67
1
0
0
1
1
1
XIN
XIN÷2
XIN÷4
XIN÷8
XIN÷8
XIN÷16
XIN÷2
XIN÷4
1
0
1
1
1
1
(reserved) (reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
1
1
0
1
1
1
14.318
133.33
66.67
33.33
33.33
16.67
tristate
66.67
1
1
1
1
1
1
14.318
133.33
66.67
33.33
33.33
16.67
48
66.67
X
X
X
0
X
X
low
low
low
low
low
low
low
low
1
0
0
14.318
low
running
33.33
low
16.67
48
low
1
0
1
14.318
low
running
33.33
33.33
16.67
48
low
1
1
0
14.318
running
running
33.33
low
16.67
48
66.67
SEL_0:1 and
SEL_133/100#
≠
0
or
SEL_0:1
≠
01
1
1
1
14.318
running
running
33.33
33.33
16.67
48
66.67