- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382968 > FS6261-01 (Electronic Theatre Controls, Inc.) Motherboard Clock Generator IC PDF資料下載
參數(shù)資料
| 型號(hào)： | FS6261-01 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Motherboard Clock Generator IC |
| 中文描述： | 主板時(shí)鐘發(fā)生器IC |
| 文件頁(yè)數(shù)： | 7/17頁(yè) |
| 文件大?。?/td> | 216K |
| 代理商： | FS6261-01 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)當(dāng)前第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
XT
January 2000
1.31.00
7
)6
0RWKHUERDUG&ORFN*HQHUDWRU,&
,62
Compared to the profile limits the modulation slew rate is
relatively slow between the limits, allowing the down-
stream PLL a chance to reduce the tracking skew. The
ability of the downstream PLL to catch up is determined
by the loop transfer function phase angle.
Spread spectrum clocking can be shown to have a negli-
gible effect on cycle-to-cycle jitter performance. Any in-
crease in jitter is less than 1ps when
δ
<1% and
f
m
<50kHz. Careful design of downstream PLLs can en-
sure that tracking skew is minimized. To have less than
100ps of tracking skew, a downstream PLL should have
a loop bandwidth greater than 1MHz, and a phase angle
less than 0.1
°
.
Figure 7 shows the tracking skew of a downstream PLL
with a loop bandwidth of 1.5MHz and a phase angle of
0.26
°
following a non-linear profile-modulated 100MHz
input clock with a
δ
=-0.5% and an f
m
=31.2kHz.
Figure 7: PLL Tracking Skew
100
80
60
40
20
0
20
40
60
80
100
PLL Tracking Skew
Time [us]
S
5.4
The active-low LVTTL SS_EN# input pin enables spread
spectrum modulation of the CPU and PCI clocks. When
SS_EN# is a logic-high, the spread spectrum modulation
of these clocks is disabled. If SS_EN# is a logic-low,
spread spectrum modulation is enabled.
A pull-up on this pin disables spread spectrum modula-
tion by default.
Spread Spectrum Enable
Figure 8: Actual Modulation Profile
65
60
55
50
45
40
35
30
25
20
15
10
5
0
99.6
99.5
99.7
99.8
99.9
100
F
1/f
m
(μs)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FS6284 | Dual PLL Clock Generator IC |
| FS6284-01 | Dual PLL Clock Generator IC |
| FS6322-05 | Three-PLL Clock Generator IC |
| FS6322-08 | THREE PLL CLOCK GENERATOR IC |
| FS6330 | LAN HUB CLOCK GENERATOR IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FS6282 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DUAL PLL CLOCK GENERATOR IC |
| FS6282-03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DUAL PLL CLOCK GENERATOR IC |
| FS6284 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual PLL Clock Generator IC |
| FS6284-01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual PLL Clock Generator IC |
| FS6322-04 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Three-PLL Clock Generator IC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。