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參數(shù)資料
| 型號： | HD49334A |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | CDS/PGA & 10-bit A/D Converter |
| 中文描述： | 的CDS /美國PGA |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 242K |
| 代理商： | HD49334A |
HD49334AF/AHF
Rev.1.0, Apr 20, 2004, page 17 of 22
Absolute Maximum Ratings
(Ta = 25
°
C)
Item
Power supply voltage
Analog input voltage
Digital input voltage
Operating temperature
Power dissipation
Storage temperature
Power supply voltage range
Notes: 1. V
DD
indicates AV
DD
and DV
DD
.
2. AV
DD
and DV
DD
must be commonly connected outside the IC. When they are separated by a noise filter, the
potential difference must be 0.3 V or less at power on, and 0.1 V or less during operation.
Electrical Characteristics
Symbol
V
DD
(max)
V
IN
(max)
V
I
(max)
Topr
Pt(max)
Tstg
Vopr
Ratings
4.1
–0.3 to AV
DD
+0.3
–0.3 to DV
DD
+0.3
–10 to +75
400
–55 to +125
2.7 to 3.3
Unit
V
V
V
°C
mW
°C
V
(Unless othewide specified, Ta = 25°C, AV
DD
= 3.0 V, DV
DD
= 3.0 V, and R
BIAS
= 33 k
)
Items Common to CDSIN and ADCIN Input Modes
Item
Symbol
Min
Typ
Power supply voltage
range
f
CLK
hi
20
—
Conversion frequency
f
CLK
low
5.5
—
V
IH
DV
DD
3.0
2.0
×
V
IL
0
—
Max
3.3
Unit
V
Test Conditions
Remarks
V
DD
2.7
3.0
36
25
DV
DD
MHz
MHz
V
LoPwr = low
LoPwr = high
HD49334AHF
HD49334AF
Digital input pins
other than CS,
SCK and SDATA
—
DV
DD
3.0
0.8
×
V
V
IH2
DV
DD
3.0
2.25
×
—
DV
DD
V
Digital input voltage
V
IL2
0
—
DV
DD
3.0
0.6
×
V
CS, SCK, SDATA
V
OH
V
OL
I
IH
I
IH2
I
IL
I
OZH
I
OZL
RES
INL
DNL+
DNL–
I
SLP
DV
DD
–0.5
—
—
—
–50
—
–50
10
—
—
–0.9
–100
—
—
—
—
—
—
—
10
(3)
0.3
–0.3
0
—
0.5
50
250
—
50
—
10
—
0.9
—
100
V
V
μ
A
μ
A
μ
A
μ
A
μ
A
bit
LSBp-p
LSB
LSB
μ
A
I
OH
= –1 mA
I
OL
= +1 mA
V
IH
= 3.0 V
V
IH
= 3.0 V
V
IL
= 0 V
V
OH
= V
DD
V
OL
= 0 V
f
CLK
= 25 MHz
f
CLK
= 25 MHz
f
CLK
= 25 MHz
Digital input pin is
set to 0 V, output
pin is open
Digital I/O pin is set
to 0 V
R
L
= 2 k
,
C
L
= 10 pF
*1
*1
Digital output voltage
Digital input current
Digital output current
ADC resolution
ADC integral linearity
ADC differential linearity+
ADC differential linearity–
Sleep current
Standby current
I
STBY
—
3
5
mA
t
HZ
t
LZ
t
ZH
t
ZL
—
—
—
—
—
—
—
—
100
100
100
100
ns
ns
ns
ns
Digital output Hi-Z
delay time
See figure 7
Notes: 1. Differential linearity is the calculated difference in linearity errors between adjacent codes.
2. Values within parentheses ( ) are for reference.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD49334AF | CDS/PGA & 10-bit A/D Converter |
| HD49335F | CDS/PGA AND 10-bit A/D TG Converter |
| HD49335HF | CDS/PGA AND 10-bit A/D TG Converter |
| HD49338F | CDS/PGA & 12-bit A/D Converter |
| HD49338HF | CDS/PGA & 12-bit A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD49334AF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49334AHNP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49334ANP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49335F | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA AND 10-bit A/D TG Converter |
| HD49335HF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA AND 10-bit A/D TG Converter |
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