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參數(shù)資料
| 型號： | HD49334A |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | CDS/PGA & 10-bit A/D Converter |
| 中文描述： | 的CDS /美國PGA |
| 文件頁數(shù)： | 18/23頁 |
| 文件大?。?/td> | 242K |
| 代理商： | HD49334A |
HD49334AF/AHF
Rev.1.0, Apr 20, 2004, page 18 of 22
Electrical Characteristics
(cont.)
(Unless othewide specified, Ta = 25°C, AV
DD
= 3.0 V, DV
DD
= 3.0 V, and R
BIAS
= 33 k
)
Items for CDSIN Input Mode
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Remarks
Consumption current (1)
I
DD1
—
45.0
54.5
mA
f
CLK
= 36 MHz
CDSIN mode
LoPwr = low
CDSIN mode
LoPwr = high
Consumption current (2)
I
DD2
—
23.5
31.0
mA
f
CLK
= 25 MHz
CCD offset tolerance range
Timing specifications (1)
V
CCD
t
CDS1
t
CDS2
t
CDS3
t
CDS4
t
CDS5
t
CDS6
t
CDS7
t
CDS8
t
CHLD9
t
COD10
CLP(00)
(–100)
—
Typ
×
0.8
—
Typ
×
0.8
Typ
×
0.85
—
(1.5)
(100)
—
Typ
×
1.2
—
Typ
×
1.2
Typ
×
1.15
mV
ns
See table 8
Timing specifications (2)
Timing specifications (3)
1/4f
CLK
(1.5)
ns
ns
Timing specifications (4)
Timing specifications (5)
1/4f
CLK
1/2f
CLK
5
—
ns
ns
Timing specifications (6)
Timing specifications (7)
1
11
9
—
ns
ns
Timing specifications (8)
Timing specifications (9)
11
3
—
7
—
—
ns
ns
C
L
= 10 pF
Timing specifications (10)
Clamp level
—
—
16
(14)
24
—
ns
LSB
CLP(09)
CLP(31)
—
—
(32)
(76)
—
—
LSB
LSB
PGA(0)
PGA(63)
–4.4
4.1
–2.4
6.1
–0.4
8.1
dB
dB
PGA(127)
PGA(191)
12.5
21.0
14.5
23.0
16.5
25.0
dB
dB
PGA gain at CDS input
PGA(255)
29.3
31.3
33.3
dB
Note : Values within parentheses ( ) are for reference.
Items for ADCIN Input Mode
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Remarks
Consumption current (3)
I
DD3
—
30.0
38.0
mA
f
CLK
= 36 MHz
ADCIN mode
LoPwr = low
Consumption current (4)
I
DD4
—
17.0
21.5
mA
f
CLK
= 25 MHz
ADCIN mode
LoPwr = high
Timing specifications (11)
Timing specifications (12)
t
ADC1
t
ADC2
t
ADC3
t
AHLD4
t
AOD5
IIN
CIN
OF2
GSL(0)
—
Typ
×
0.85
Typ
×
0.85
10
(6)
1/2f
ADCLK
1/2f
ADCLK
14.5
—
Typ
×
1.15
Typ
×
1.15
—
ns
ns
Timing specifications (13)
Timing specifications (14)
ns
ns
C
L
= 10 pF
Timing specifications (15)
Input current at ADC input
—
–110
23.5
—
31.5
110
ns
μ
A
See table 9
V
IN
= 1.0 V to 2.0 V
Clamp level at ADC input
PGA gain at ADC input
—
0.45
(512)
0.57
—
0.72
LSB
Times
GSL(63)
GSL(127)
1.36
2.26
1.71
2.85
2.16
3.59
Times
Times
GSL(191)
GSL(255)
3.18
4.06
4.00
5.12
5.04
6.45
Times
Times
Note : Values within parentheses ( ) are for reference.
相關PDF資料 |
PDF描述 |
|---|---|
| HD49334AF | CDS/PGA & 10-bit A/D Converter |
| HD49335F | CDS/PGA AND 10-bit A/D TG Converter |
| HD49335HF | CDS/PGA AND 10-bit A/D TG Converter |
| HD49338F | CDS/PGA & 12-bit A/D Converter |
| HD49338HF | CDS/PGA & 12-bit A/D Converter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HD49334AF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49334AHNP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49334ANP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA & 10-bit A/D Converter |
| HD49335F | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA AND 10-bit A/D TG Converter |
| HD49335HF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:CDS/PGA AND 10-bit A/D TG Converter |
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