參數(shù)資料
型號(hào): HD66841
廠商: Hitachi,Ltd.
英文描述: LVIC-II (LCD Video Interface Controller)(LCD視頻控制器)
中文描述: LVIC - 2(液晶視頻接口控制器)(液晶顯示視頻控制器)
文件頁(yè)數(shù): 45/62頁(yè)
文件大小: 185K
代理商: HD66841
HD66841
45
Programming
The values written in internal registers have the limits listed in Table 15. The symbols in the table are
defined as shown in Table 16 and Figure 32.
Table 15
Limits on Register Values
Item
Limits
Notes
Applicable Registers
Screen
configuration
4
Nvd
(Ncvbp + Ncvsp) – 1
1024
4
Nhd
(Nchbp
×
1/n + Nchsp) – 1
506
(Nhd + 6)
×
n
×
Nvd
×
f
FLM
f
DOTCLK
30 MHz
1, 2
R2, R3, R4, R6, R7
1, 3
R2, R3, R4, R6, R7
CL3 signal
control
1
Npw
(Nhd + 6)/2 – 1
1
Npw
Nhd
1
Npw
Npc – 1
Npc
(Nhd + 6)/2 – 1
1
Nchbp
256
1
Ncvbp
256
4
Nhd
Nchsp – 4
4
Nvd
Ncvsp – 1
4
5
6
R4, R5, R6, R7, R8
DISPTMG signal
generation
7
R12, R13
7
R13, R15
No memory
8
R2, R3, R4
8
R6, R7
Notes: 1. Lowercase n indicates the horizontal character pitch which is the number of horizontal dots
composing a character.
2. Nhd
250 in the dual screen modes (display modes 1, 6, and 16).
3. f
FLM
is the FLM signal frequency and f
DOTCLK
is the CRT display dot clock (DOTCLK) frequency.
f
LDOTCK
< f
DOTCLK
×
15/16 or f
LDOTCK
= f
DOTCLK
(f
LDOTCK
is the LCD dot clock (LDOTCK) frequency)
4. In display modes 1, 2, 4, and 6–8
5. In display modes 3, 5, and 9–12 when Npw = (value in R8) + 5
6. In display modes 13–15 when Npw = (value in R8) + 5
7. (Value in R14 and R15)
(Nchsp
×
n + Nchbp) – Nhd
×
n – 2
(n = horizontal character pitch)
(Value in R12 and R13)
(Ncvsp + Ncvbp) – Nvd – 2
8. Nht = Nchsp + (Nchbp
×
1/n), Nvd < Ncvbp + Ncvsp
(Nht = (Nhd + 6) if buffer memory is used)
(n = horizontal character pitch)
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