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參數(shù)資料
| 型號： | HM-6504 |
| 廠商： | Intersil Corporation |
| 英文描述： | 4096 x 1 CMOS RAM |
| 中文描述： | 4096 × 1 CMOS存儲器 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 167K |
| 代理商： | HM-6504 |
6-135
Functional Diagram
NOTES:
1. All lines active high-positive logic.
2. Three-state Buffers: A high
→
output active.
3. Control and Data Latches: L low
→
Q = D and Q latches on rising edge of L.
4. Address Latches: Latch on falling edge of E.
5. Gated Decoders: Gate on rising edge of G.
A
LATCHED
ADDRESS
REGISTER
6
A
6
G
64 x 64
MATRIX
64
GATED COLUMN
DECODER AND
DATA I/O
A
L
Q
L
Q
D
L
Q
D
LATCH
LATCH
LATCH
A
L
LATCHED
ADDRESS
REGISTER
G
GATED
ROW
DECODER
A
6
6
64
L
D
Q
D
L
Q
A8
A7
A6
A0
A1
A2
LSB
E
W
D
A
LSB A11 A5 A4 A3 A9 A10
LATCH
HM-6504/883
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM-6504883 | 4096 x 1 CMOS RAM |
| HM1-6504B883 | 4096 x 1 CMOS RAM |
| HM1-6508B883 | 1024 x 1 CMOS RAM |
| HM1-6508883 | 1024 x 1 CMOS RAM |
| HM-6508 | 1024 x 1 CMOS RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM-6504/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:4096 x 1 CMOS RAM |
| HM-6504883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:4096 x 1 CMOS RAM |
| HM-6508 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024 x 1 CMOS RAM |
| HM-6508/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024 x 1 CMOS RAM |
| HM-6508883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024 x 1 CMOS RAM |
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