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參數(shù)資料
| 型號(hào)： | HN29W256AH03TE |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Controller for AND Flash Memory(AND型閃速存儲(chǔ)器控制器) |
| 中文描述： | 控制器及快閃記憶體（及型閃速存儲(chǔ)器控制器） |
| 文件頁(yè)數(shù)： | 7/73頁(yè) |
| 文件大?。?/td> | 239K |
| 代理商： | HN29W256AH03TE |
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HN29W256AH03TE-1
7
Host Interface Pin Explanation
Signal name
Direction Pin No.
Description
A10 to A0
(PC Card Memory mode)
I
2, 119, 116, 114,
112, 108, 107,
104, 102, 100, 98
Address bus is A10 to A0. A10 is MSB and A0 is
LSB.
A10 to A0
(PC Card I/O mode)
A2 to A0
(True IDE mode)
102, 100, 98
Address bus is A10 to A0. Only A2 to A0 are used,
the remaining address lines should be grounded by
the host.
BVD1
(PC Card Memory mode)
I/O
95
BVD1 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-STSCHG
(PC Card I/O mode)
-STSCHG is used for changing the status of
Configuration and status register in attribute area.
-PDIAG
(True IDE mode)
-PDIAG is the Pass Diagnostic signal in Master/Slave
handshake protocol.
BVD2
(PC Card Memory mode)
I/O
97
BVD2 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-SPKR
(PC Card I/O mode)
-SPKR outputs speaker signals. This output line is
constantly driven to a high state since this product
does not support the audio function.
-DASP
(True IDE mode)
-DASP is the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
-CE1, -CE2
(PC Card Memory mode)
Card Enable
I
3, 4
-CE1 and -CE2 are low active card select signals.
Byte/Word/Odd byte mode are defined by combination
of -CE1, -CE2 and A0.
-CE1, -CE2
(PC Card I/O mode)
Card Enable
-CE1, -CE2
(True IDE mode)
-CE2 is used for select the Alternate Status Register
and the Device Control Register while -CE1 is the chip
select for the other task file registers.
-CSEL
(PC Card Memory mode)
I
109
This signal is not used.
-CSEL
(PC Card I/O mode)
-CSEL
(True IDE mode)
This signal is used to configure this device as a
Master or a Slave when configured in the True IDE
mode. When this pin is grounded, this device is
configured as a Master. When the pin is open, this
device is configured as a Slave.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HN29W256H02TE-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEMORY CONTROLLER |
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| HN29W3221T-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AND Flash EEPROM |
| HN29W3221T-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AND Flash EEPROM |
| HN29W51214ST | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash Application Design Guidelines Others |
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