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參數(shù)資料
| 型號： | HSP50214AVC |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Programmable Downconverter |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP120 |
| 文件頁數(shù)： | 53/60頁 |
| 文件大?。?/td> | 467K |
| 代理商： | HSP50214AVC |
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53
11-10
Q Data Serial Output
Tag Bit
(See I Data Serial Output Tag selection above).
9-8
Magnitude Data Se-
rial Output Tag Bit
(See I Data Serial Output Tag selection above).
7-6
Phase Data Serial
Output Tag Bit
(See I Data Serial Output Tag selection above).
5-4
Frequency Data Se-
rial Output Tag Bit
(See I Data Serial Output Tag selection above).
3-2
AGC Data Serial
Output Tag Bit
(See I Data Serial Output Tag selection above).
1-0
Timing Error Data
Serial Output Tag Bit
(See I Data Serial Output Tag selection above).
CONTROL WORD 21: BUFFER RAM OUTPUT CONTROL REGISTER (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
31-16
Reserved
Reserved.
15
Output Buffer Mode
0- The output buffer operates in snapshot mode.
1- The output buffer operates in FIFO mode.
14-12
FIFO Mode Depth
Threshold
In FIFO mode, when the FIFO depth reaches this threshold, an interrupt is generated and the
READY flag is asserted. The threshold may be set from 0 to 7. Bit 14 is the MSB. The interrupt
is generated when the FIFO depth reaches the threshold, as the FIFO fills.
11-4
Snapshot Mode
Interval
In snapshot mode, the interval between snapshots in the output sample times is determined by
this 8-bit binary number, i.e. 256, (2
8
), sample time counts between snapshot samples. Program
this parameter to 1 less than the desired interval. Bit 11 is the MSB.
3-0
Snapshot Mode
Number of Samples
In snapshot mode, the number of samples stored each time the snapshot interval counter times
out is equal to the decimal version of this 4-bit number. The range is 1- 8. Bit 3 is the MSB.
CONTROL WORD 22: BUFFER RAM OUTPUT FIFO RESET (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
N/A
FIFO reset
A write to this address increments the output FIFO RAM address pointers to READ = 111 and
WRITE = 000.
CONTROL WORD 23: INCREMENT OUTPUT FIFO (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
N/A
FIFO Strobe
A write to this address increments the output FIFO/buffer to the next sample set.
CONTROL WORD 24: SYNCOUT STROBE OUTPUT PIN
(SYNCHRONIZED TO CLKIN OR PROCCLK DEPENDING ON PROGRAMMING IN CONTROL WORD 0)
BIT
POSITION
FUNCTION
DESCRIPTION
N/A
SYNCOUT Strobe
A write to this address generates a one clock period wide strobe on the SYNCOUT pin that is
synchronized to the clock. This strobe may be synchronized to CLKIN or PROCCLK based on
the programming of bit 3 of Control Word 0.
CONTROL WORD 20: BUFFER RAM, DIRECT PARALLEL, AND DIRECT SERIAL OUTPUT CONFIGURATION
(SYNCHRONIZED WITH PROCCLK) (Continued)
BIT
POSITION
FUNCTION
DESCRIPTION
HSP50214A
相關PDF資料 |
PDF描述 |
|---|---|
| HSP50214AVI | Programmable Downconverter |
| HSP50214B | Programmable Downconverter |
| HSP50214BVC | Programmable Downconverter |
| HSP50214BVI | Programmable Downconverter |
| HT84 | ADSL Coupling Transformers |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50214AVI | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214BVC | 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214BVCZ | 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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