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參數(shù)資料
| 型號： | HSP50214AVC |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Programmable Downconverter |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP120 |
| 文件頁數(shù)： | 9/60頁 |
| 文件大?。?/td> | 467K |
| 代理商： | HSP50214AVC |
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9
a gain error for use in an AGC loop with either the RF/IF or
A/D converter stages (see Figure 8). The AGC loop
includes Input Level Detector, the microprocessor and an
external gain control amplifier (or attenuator). The input
samples are rectified and added to a threshold pro-
grammed via the microprocessor interface, as shown in
Figure 9. The bit weighting of the data path through the
input threshold detector is shown in Figure 10. The thresh-
old is a signed number, so it should be set to the inverse of
the desired input level. The threshold can be set to zero if
the average input level is desired instead of the error. The
sum of the threshold and the absolute value of the input is
accumulated in a 32-bit accumulator. The accumulator can
handle up to 2
18
samples without overflow. The integration
time is controlled by an 18-bit counter. The integration
counter preload (ICPrel) is programmed via the micropro-
cessor interface through Control Word 1. Only the upper 16
bits are programmable. The 2 LSBs are always zero. Con-
trol Word 1, Bits 29-14 are programmed to:
where N is the desired integration period, defined as the
number of input samples to be integrated. N must be a multi-
ple of 4: [0, 4, 8, 12, 16 .... , 2
18
].
ICPrel
N
( )
4
1
+
=
(EQ. 1)
FIGURE 3. BLOCK DIAGRAM OF THE INPUT SECTION
Without Interpolation, the CIC bypass path exceeds the HB/FIR filter
input sample rate and the CIC filter path will not yield the desired 85dB
dynamic range band width of 500kHz.
FIGURE 4. STATEMENT OF THE PROBLEM
FIGURE 5. BLOCK DIAGRAM OF THE INTERPOLATION
APPROACH
I
IN(13:0)
INPUT_FMT
INPUT_THRESH
INTG_MODE
INTG_INTEVAL
ENI
LEVEL
DETECT
R
R
INPUT_MODE
NCO
R
R
DELAY 3
DELAY 3
GAINADJ(2:0)
S
C
CONTROL WORD 0
CONTROL
LOGIC
CONTROL WORD 1
CLKIN
Controlled via microprocessor interface.
See NCO Section for more details.
INPUT_THRESH
INTG_MODE
INTG_INTEVAL
INTERP
INPUT
FORMAT
BYPASS
M
INPUT LEVEL DETECTOR
STATUS (0)
∑
LIMIT
4
3
EN
4
14
14
18
18
CIC
FILTER
HB/FIR FILTER
5MHz
500kHz = 85dB
BANDWIDTH
(NOT ACHIEVED
WITH CIC FILTER
PATH)
M
MAX. f
S
= 4MHz
(EXCEEDED IN
BYPASS PATH)
MIN. R = 4
BYPASS
PROCCLK = 28MHz
CIC FILTER
R =
↓
10
↑
8 (0 STUFF) = 40MHz
500kHz = 85dB
BANDWIDTH
4MHz
HB/FIR FILTER
5MHz
HSP50214A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSP50214AVI | Programmable Downconverter |
| HSP50214B | Programmable Downconverter |
| HSP50214BVC | Programmable Downconverter |
| HSP50214BVI | Programmable Downconverter |
| HT84 | ADSL Coupling Transformers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50214AVI | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214BVC | 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50214BVCZ | 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROG DWNCNVRT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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