參數(shù)資料
型號： HT9580
廠商： Holtek Semiconductor Inc.
英文描述： Character Pager Controller
中文描述： 字符傳呼機(jī)控制器
文件頁數(shù)： 30/63頁
文件大小： 444K
代理商： HT9580
HT9580
30
April 28, 2000
Preliminary
SPI SPEED register (write only)
Address
Register
Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
State on
POR
0033H
SPI-SPEED
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
0000 0000
The register will determine the SCK clock frequency of SPI. When SPEED register are 00H, the SCK
clock output is high. The value of the frequency divider, ranging from 1 (SPEED=01H)~255
(SPEED=FFH). If SPEED=00H, the SCK output will be disabled.
' B
" B # $3
A
SPI output buffer register (write only)
Address
Register
Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
State on
POR
0034H
SPI-OUT3
D7
D6
D5
D4
D3
D2
D1
D0
0000 0000
0035H
SPI-OUT2
D7
D6
D5
D4
D3
D2
D1
D0
0000 0000
0036H
SPI-OUT1
D7
D6
D5
D4
D3
D2
D1
D0
0000 0000
0037H
SPI-OUT0
D7
D6
D5
D4
D3
D2
D1
D0
0000 0000
TheSPI-OUT3~0areusedwhentransmittingdataontheserialbus.Onlyvaliddatawritetothereg-
ister SPI-OUT3~0 and "START" initiating will begin the SPI data transmission from HT9580 to
FLEX
TM
decoder. After completion of the 4-byte data transfer, the "SPIFG" status bit will be set and
the internal signal REQST
will generate a falling edge signal for NMI. The bit7 of SPI-OUT3 is
MSB and bit0 of SPI-OUT0 is LSB.
7
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A
9
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2
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