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HT9580
38
April 28, 2000
Preliminary
Address word format
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Sync. State
Call Address
Dup. Call
Valid Address
Function Code
Note: Bit0: Bit21 of the address code-word
Bit1: bit20 of the address code-word
Bit2: If this bit is 1 , the address word is valid, oterwise the address word is not valid.
Bit3: 1 for a duplicate code-word
Bit7: 1 if an address code-word is received in the data fail mode
Bit6
Bit5
Bit4
Call Address
0
0
0
RIC A
0
0
1
RIC B
0
1
0
RIC C
0
1
1
RIC D
1
0
0
RIC E
1
0
1
RIC F
1
1
0
1
1
1
Interrupt indication
The HT9580 provides an internal data ready
interrupt and a battery fail interrupt. The in-
ternal data ready interrupt and battery fail
interrupt share the NMI location. Which in-
terrupt occurred can be determined by check-
ing the battery fail interrupt bit (BF_FG; bit 4
of 0006H) and the data ready interrupt bit
(DR_FG; bit 5 of 0006H). Both interrupt bits
are active high.
Test mode
The test mode of the decoder is selected by set-
ting the TS pin low at any time. In the test
mode, the RF control outputs BS1 and BS3 are
constantlysethigh,butBS2issetlow.Afterthe
TS pin is set high the decoder exits the test
mode.
Message data transfer
The decoder outputs a deformatted address
word and message words upon receipt of a valid
call. The message data to be transferred is or-
ganized into 8-bit words and transferred to the
message buffer address (0040H to 006DH). The
data ready interrupt flag will be set high when
the received data (including address code-
word and message codeword) length is ter-
minated within 46 bytes, one batch is over
or if the 46 bytes data buffer is full if data
length is more than 46 bytes. If the data in
the message buffer is terminated, the
MSG_END (0031H) bit will set high.
The address word indicates call address,
functional bit setting, and decoder flags. The
message code-words are received and con-
catenated to a valid call address word. The
message words are derived from un-cor-
rected message code-words.