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HT9580
33
April 28, 2000
Preliminary
Alert-only calls consist of a single address
code-word. Numeric and alphanumeric calls
have message code-words following the address.
Message code-words are identified by an MSB
of logic 1. The message information is stored in
a 20-bit field (bits 2 to 21). The data format is
determined by the call type: 4 bits per digit for
numericmessageand7bitsper(ASCII)charac-
ter for alphanumeric messages. Each
code-word is protected against transmission er-
rors by 10 CRC check bits (bit 22 to 31) and an
even parity bit (bit 32).
This permits correction of a maximum of 2 ran-
dom errors or up to 4 errors in a burst of 4 bits
(a 4-bit burst error) per code-word.
Error correction
Item
Description
Address
code-word
two random errors, or 4-bit
burst errors (optional)
Message
code-word
two random errors, or 4-bit
burst errors (optional)
Error correction
In the HT9580, error correction methods have
been implemented as shown in the table above.
Random error correction is the default for
both address and message code-word. In an-
other method, burst error correction can be
switched by SPF programming. Up to 4 erro-
neous bits in a 4-bit burst can be corrected.
The error type detected for each code-word is
identified in the message data output to the
microcontroller, allowing rejection of calls with
too many errors.
Operating states
ON status
STANDBY status
The operating state is determined by control
address (0019H) bit 0 and monitored by bit 3
of address (0019H).
Truth table for decoder operating status
ON Input
Operating Status
0
On state
1
STANDBY state
On status
In the ON status, the decoder pulses the re-
ceiver, quick charge and PLL enable outputs
(respectively BS1, BS2 and BS3) according to
the code structure and the synchronization
algorithm. Data received serially at the data
input (DI) is processed for call receipt.
STB status
In the STB status the decoder will neither ac-
tivate the receiver, quick charge or PLL en-
able outputs, nor process any data at the data
input. The crystal oscillator remains active to
permitcommunicationwiththemicrocontrol-
ler.
Battery saving
Current consumption is reduced by switching
the STB internal decoder sections whenever
the receiver is not enabled. To further increase
battery efficiency, reception and decoding of an
address code-word is stopped as soon as the un-
corrected address field differs by more than
3-bits from the enabled RICs. If the next
code-wordhastobereceivedagain,thereceiver
is re-enabled, thus observing the programmed
establishment times t
BS1
, t
BS2
and t
BS3
.
Data reception and buffer
Reception of a valid paging call is signaled to
the microcontroller by means of an interrupt
signal. The received address and message
code-word can then be read via a 46 bytes
messagebuffer(from0040Hto006DH)forde-
coder data message. If the C did not read the
previous message within one code-word time
from the message buffer, the message buffer
data will be overwritten.
Bit rates
The HT9580 can be configured for data rates
of 512, 1200 or 2400 bit/s by SPF program-
ming. These data rates are derived from
32.768kHz, 76.8kHz or 153.6kHz oscillator
frequencies.
Input data processing
The input data is noise filtered by means of a
digital filter. Data is sampled at 16 times the
data rate and averaged by majority decision.