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| 型號： | HV7131B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS IMAGE SENSOR With 8-bit ADC |
| 中文描述： | CMOS圖像傳感器的8位ADC |
| 文件頁數(shù)： | 11/29頁 |
| 文件大?。?/td> | 834K |
| 代理商： | HV7131B |
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HV7131B
Electronics Industries Co., Ltd.
System IC Division
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0 - 11 - 1999 Hyundai System IC Division
PRELIMINARY
REGISTER DESCRIPTION
MODE_A[8’h00]
Represent device identity. High nibble: Sensor Array Size, Low Nibble: Revision Number
For HV7131B, identity value is 8’ h00, [VGA: 0, Revision 0]
MODE_B[8’h01]
This is operating mode select register. Each bit's description is as below.
Bit
Function
Description
0
Integration time unit
Selects integration time unit between line unit and pixel unit. Commonly
line unit is used for its large step control, but under high luminance or when
precise control is needed in the case such as anti-flicker, pixel unit control
is used.
Default is line unit mode[0].
1
Single Frame mode
Selects continuous frame output and single frame output. When single shot
mode is selected, only one frame data is produced and the sensor goes to
idle mode.
Default is continuous frame output mode[0].
2
Window Mode
Selects imaging array size between programmable window size and full
size [648x488]. Default is window size mode[1] and current window default
size is 641x482. [Window size is determined by RowStartAddress, Column
StartAddress, WindowWidth, WindowHeight Registers.]
3
HSYNC output mode
Selects HSYNC output mode between “data valid mode” and “data valid
with clock mode”.
Default is data valid mode[0].
4,5
Output data type
Selects output data type among (data – reference), data only or reference
only. Internally the sensor produces reference data and image data
respectively, and image data is deducted by reference data in order to
reduce Fixed Pattern Noise. Generally the technique is called Correlated
Double Sampling(CDS).
Default is data - reference (CDS) [00].
6,7
Operation Mode
Selects sensor operation mode among normal sensing mode and chip test
related modes. In normal use, the mode should be set to normal mode[00].
Default is normal operation mode[00].
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HV7131GP | CMOS Image Sensor with Image Signal Processing |
| HV7131RP | CMOS Image Sensor with Image Signal Processing |
| HV7131E1 | CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COB | CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COF | CMOS IMAGE SENSOR With 8-bit ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HV7131D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COB | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131D-COF | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131E1 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7131GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Image Sensor with Image Signal Processing |
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