參數(shù)資料
型號(hào)： HV7131B
廠商： Electronic Theatre Controls, Inc.
英文描述： CMOS IMAGE SENSOR With 8-bit ADC
中文描述： CMOS圖像傳感器的8位ADC
文件頁數(shù)： 9/29頁
文件大?。?/td> 834K
代理商： HV7131B
HV7131B
Electronics Industries Co., Ltd.
System IC Division
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA31991011R_1.0 - 9 - 1999 Hyundai System IC Division
PRELIMINARY
PIN DESCRIPTION (48 Pin CLCC)
PIN
1
2
NAME
SCK
DGND
I/O
I
I
DESCRIPTION
I
2
C clock ; I
2
C clock control from I
2
C master
Digital Ground
Sensor Enable Signal ; 'H' enable normal operation
'L' disable
Digital Ground
Master Clock (up to 15MHz)
; Global master clock for image sensor internal timing control
I/O bias voltage for 5V tolerant *1)
Analog Supply Voltage 3.3V
Analog Ground
No Connection
Analog Ground
Analog Supply Voltage 3.3V
Reserved
Digital Ground
Image Data bit 7
Image Data bit 6
Image Data bit 5
Image Data bit 4
Digital Ground
Image Data bit 3
Image Data bit 2
Image Data bit 1
Image Data bit 0
Digital Supply Voltage 3.3V
Digital Ground
No Connection
Digital Supply Voltage 3.3V
Hardware Reset Signal, Active Low
Vertical synchronization signal / Frame start output
; Signal pulse at start of image data frame with programmable
blanking duration
Horizontal synchronization signal / Data valid output
; Data valid when 'H' with programmable blanking duration
Digital Ground
I
2
C Data ; I
2
C standard data I/O port
Digital Ground
3
ENB
I
4
DGND
I
5
MCLK
I
6
7
8
VDD5
AVDD
AGND
N.C
AGND
AVDD
Reserved
DGND
DATA7
DATA6
DATA5
DATA4
DGND
DATA3
DATA2
DATA1
DATA0
DVDD
DGND
N.C
DVDD
RESET
I
I
I
9 ~ 16
17
18
19, 20
21
22
23
24
25
26
27
28
29
30
31
32
33 ~ 41
42
43
I
I
I
O
O
O
O
I
O
O
O
O
I
I
I
I
44
VSYNC
O
45
HSYNC
/DVALID
DGND
SDA
DGND
O
46
47
48
I
I/O
I
*1) Tie to DVDD for 3.3V operation / Tie to 5V for 5V tolerant operation
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