參數(shù)資料
型號: HY5PS12423F
英文描述: 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述: 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁數(shù): 64/66頁
文件大?。?/td> 862K
代理商: HY5PS12423F
Rev. 0.52/Nov. 02 64
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
CAPACITANCE
(T
A
=25
o
C, f=100MHz )
Note :
1. VDD = min. to max., VDDQ = 1.7V to 1.9V, V
O
DC = VDDQ/2, V
O
peak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Parameter
Pin
Symbol
Min
Max
Unit
Input Clock Capacitance
CK, CK
CCK
1.5
2.5
pF
Delta Input Clock Capacitance
CK, CK
CDCK
-
0.25
pF
Input Capacitance
All other input-only pins
CI
1.5
2.5
pF
Delta Input Capacitance
All other input-only pins
CDI
-
0.25
pF
Input / Output Capacitance
DQ, DQS, DM
CIO
3.0
4.0
pF
Delta Input / Output Capacitance
DQ, DQS, DM
CDIO
-
0.5
pF
VTT
R
T
=25
VDDQ
DUT
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