參數(shù)資料
型號: HYB25D128400CT-5
廠商: QIMONDA AG
元件分類: DRAM
英文描述: 32M X 4 DDR DRAM, 0.7 ns, PDSO66
封裝: PLASTIC, TSOP2-66
文件頁數(shù): 21/44頁
文件大小: 2618K
代理商: HYB25D128400CT-5
HYB25D128[40/80/16]0C[C/E/F/T]
128-Mbit Double-Data-Rate SDRAM
Internet Data Sheet
Rev. 1.70, 2008-04
28
03292006-U5AN-6TI1
TABLE 21
Electrical Characteristics and DC Operating Conditions
1) 0
°C ≤ T
A ≤ 70 °C; VDD = VDDQ = 2.5 V ± 0.2 V
2) Under all conditions,
V
DDQ must be less than or equal to VDD.
3) Peak to peak AC noise on
V
REF may not exceed ± 2% VREF.DC. VREF is also expected to track noise variations in VDDQ.
4)
V
TT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and
must track variations in the DC level of
V
REF.
5) Inputs are not recognized as valid until
V
REF stabilizes.
6)
V
ID is the magnitude of the difference between the input level on CK and the input level on CK.
7) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature and
voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
8) Values are shown per pin.
Parameter
Symbol
Values
Unit Note/Test Condition 1)
Min.
Typ.
Max.
Device Supply Voltage
V
DD
2.3
2.5
2.7
V
f
CK ≤ 200 MHz
Output Supply Voltage
V
DDQ
2.3
2.5
2.7
V
f
CK ≤ 200 MHz
Supply Voltage,
I/O Supply Voltage
V
SS, VSSQ
00
V
Input Reference Voltage
V
REF
0.49
× V
DDQ
0.5
× V
DDQ
0.51
× V
DDQ
V
I/O Termination Voltage
(System)
V
TT
V
REF – 0.04
V
REF + 0.04
V
Input High (Logic1) Voltage
V
IH.DC
V
REF + 0.15
V
DDQ + 0.3
V
Input Low (Logic0) Voltage
V
IL.DC
–0.3
V
REF – 0.15
V
Input Voltage Level,
CK and CK Inputs
V
IN.DC
–0.3
V
DDQ + 0.3
V
Input Differential Voltage,
CK and CK Inputs
V
ID.DC
0.36
VDDQ + 0.6
V
VI-Matching Pull-up Current
to Pull-down Current
VI
Ratio
0.71
1.4
Input Leakage Current
I
I
–2
2
μA
Any input 0 V
V
IN VDD;
All other pins not under test
=0V 8)
Output Leakage Current
I
OZ
–5
5
μA
DQs are disabled;
0V
V
OUT VDDQ
Output High Current,
Normal Strength Driver
I
OH
–16.2
mA
V
OUT = 1.95 V
Output Low Current,
Normal Strength Driver
I
OL
–16.2
mA
V
OUT = 0.35 V
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