參數(shù)資料
型號(hào)： HYE18P32160ACL96
廠商： INFINEON TECHNOLOGIES AG
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No
中文描述： 32M的同步突發(fā)的CellularRAM
文件頁數(shù)： 23/53頁
文件大?。?/td> 1426K
代理商： HYE18P32160ACL96
Data Sheet
23
V2.0, 2003-12-16
HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
Figure 10
PASR Configuration Example
2.3.2
To put the device in deep power down mode the DPD control bit must be asserted to low. Once set into this
extreme low power mode current consumption is cut down to less than 25
μ
A.
All internal voltage generators inside the CellularRAM are switched off and the internal self-refresh is stopped. This
means that all stored memory information will be lost by entering DPD. Only the register values of BCR and RCR
are kept valid during DPD. To leave the Deep Power Down mode again the Refresh Configuration Register has
to be accessed and the DPD bit has to be programmed to high level voltage.
A guard time of at least 150
μ
s has to be met where no commands beside a NOP must be applied to re-enter again
standby or idle mode.
Deep Power Down Mode
2.3.3
The 2-bit wide TCSR field features four different temperature ranges to adjust the refresh period to the actual case
temperature. DRAM technology requires higher refresh rates at higher temperature. At low temperature the
refresh rate can be reduced, which reduces as well the standby current of the chip. This feature can be used in
addition to PAR to lower power consumption in case of low or medium temperatures. Please refer to
Table 10
.
Temperature Compensated Self Refresh (TCSR)
2.3.4
Table 10
demonstrates the currents in standby mode when PASR, TCSR or DPD is applied.
Power Saving Potential in Standby When Applying PASR, TCSR or DPD
Table 10
Operation
Mode
NO
OPERATION/
DESELECT
Standby Currents When Applying PASR, TCSR or DPD
Power Mode
PASR
Bit
Controlled
RCR.Bit6-5
RCR.Bit2-0
Wake-Up
Phase
–
–
Active
Array
–
Full
1/2
1/4
1/8
0
0
Standby [
μ
A]
STANDBY
TCSR
PASR
85°
90(120)
80(105)
70(90)
60(75)
50(60)
70°
75(100)
68(90)
62(80)
55(70)
50(60)
45°
60(80)
56(75)
53(70)
52(65)
50(60)
15°
50(60)
50(60)
50(60)
50(60)
50(60)
DPD
DEEP POWER
DOWN
DPD
RCR.Bit4
~150
μ
s
25.0
24Mb
Deactivated
000000h
07FFFFh
RCR.Bit 2,1,0= 010
Active Memory
Array defined by
PASR to 8Mb
8M
Activated
32Mb CellularRAM
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