參數(shù)資料
型號: HYE18P32160ACL96
廠商: INFINEON TECHNOLOGIES AG
元件分類: 圓形連接器
英文描述: Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No
中文描述: 32M的同步突發(fā)的CellularRAM
文件頁數(shù): 28/53頁
文件大?。?/td> 1426K
代理商: HYE18P32160ACL96
3 0 1 2
0 1 2 3 4 5 6 7
1 2 3 4 5 6 7 0
2 3 4 5 6 7 0 1
3 4 5 6 7 0 1 2
4 5 6 7 0 1 2 3
5 6 7 0 1 2 3 4
6 7 0 1 2 3 4 5
7 0 1 2 3 4 5 6
0 1 2 … 13 14 15
1 2 3 … 14 15 0
2 3 4 … 15 0 1
13 14 15 … 10 11 12
14 15 0 … 11 12 13
15 0 1 … 12 13 14
HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
Data Sheet
28
V2.0, 2003-12-16
2.4.2
The numbers of words that are read during a burst read access is defined by the burst length field which is
programmed in the Bus Control Register. The user can either program fixed burst lengths of 4-words, 8-words or
16-words or operate the device in continuous mode operation. The burst start address is latched by ADV set to
low. An internal address counter then increments automatically the address with respect to the programmed burst
length.
Continuous burst operation does not stop automatically though a row boundary has been reached. In other words,
unlike with fixed burst lengths, a continuous burst goes on until it is actively terminated by bringing CS to high
sampled at the valid edge of CLK.
The wrap mode option specifies whether the burst address overflows and restarts at address 0 (A3 - A0) or keeps
incrementing. In continuous burst mode, the internal address counter wraps to 000000
H
if the operation goes on
past the last address, 1FFFFF
H
regardless of wrap mode setting. For the several possible burst sequences please
refer to
Table 12
.
The burst length is only configurable for burst read while burst write uses always continuous burst mode,
independent of the burst length setting in the burst control register BCR. Same for burst wrap, in burst write there
is always the default - no wrap - used, independent on read burst register setting.
Read Burst Configurations/Sequences
Table 12
Burst Length
Burst Sequences
Starting Address
(A3 A2 A1 A0)
Sequential Burst Addressing Scheme
(decimal)
Wrap On
0 1 2 3
1 2 3 0
2 3 0 1
Wrap Off
0 1 2 3
1 2 3 4
2 3 4 5
3 4 5 6
0 1 2 3 4 5 6 7
1 2 3 4 5 6 7 8
2 3 4 5 6 7 8 9
3 4 5 6 7 8 9 10
4 5 6 7 8 9 10 11
5 6 7 8 9 10 11 12
6 7 8 9 10 11 12 13
7 8 9 10 11 12 13 14
0 1 2 … 13 14 15
1 2 3 … 14 15 16
2 3 4 … 15 16 17
13 14 15 … 26 27 28
14 15 16 … 27 28 29
15 16 17 … 28 29 30
xx00
xx01
xx10
xx11
x000
x001
x010
x011
x100
x101
x110
x111
0000
0001
0010
1101
1110
1111
n
8
16
Continuous
Cn, Cn+1, Cn+2, … Cmax
1)
, 0, 1, …
(default, write burst)
1) Cmax = 1FFFFF
H
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