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參數(shù)資料
| 型號(hào)： | HYS 64V4200GDL |
| 廠商： | SIEMENS AG |
| 英文描述： | 3.3 V SDRAM Modules(3.3 V 同步動(dòng)態(tài)RAM模塊) |
| 中文描述： | 3.3伏內(nèi)存模塊（3.3伏同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 10/15頁(yè) |
| 文件大?。?/td> | 126K |
| 代理商： | HYS 64V4200GDL |
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HYS 64V4200GDL/HYS 64V8220GDL
144-pin SO-DIMM SDRAM Modules
Data Book
10
12.99
Notes
1. An initial pause of 100
μ
s is required after power-up. Then, a Precharge All Banks command
must be given, followed by eight Auto Refresh (CBR) cycles before the Mode Register Set
Operation can begin.
2. AC timing tests have
V
IL
= 0.4 V and
V
IH
= 2.4 V with the timing referenced to the 1.4 V crossover
point. The transition time is measured between
V
IH
and
V
IL
. All AC measurements assume
t
T
= 1 ns with the AC output load circuit shown. Specified
t
AC
and
t
OH
parameters are measured
with a 50 pF only, without any resistive termination and with an input signal of 1 V/ns edge rate
between 0.8 V and 2.0 V.
3. If clock rising time is longer than 1 ns, a time (
t
T
– 0.5) ns must be added to this parameter.
4. If
t
T
is longer than 1 ns, a time (
t
T
– 1) ns must be added to this parameter.
5. Whenever the refresh Period has been exceeded, a minimum of two Auto (CRB) Refresh
commands must be given to “wake-up” the device.
6. Self Refresh Exit is a synchronous operation and begins on the second positive clock edge after
CKE returns high. Self Refresh Exit is not complete until a time period equal to
t
RC
is satisfied
after the Self Refresh Exit command is registered.
7. Referenced to the time at which the output achieves the open circuit condition, not to output
voltage levels.
A serial presence detect storage device - E
2
PROM - is assembled onto the module. Information
about the module configuration, speed, etc. is written into the E
2
PROM device during module
production using a serial presence detect protocol (I
2
C synchronous 2-wire bus).
50 pF
I/O
Measurement conditions for
t
AC
and
t
OH
SPT03404
CLOCK
2.4 V
0.4 V
INPUT
HOLD
t
SETUP
t
t
T
OUTPUT
1.4 V
t
LZ
AC
t
t
AC
OH
t
HZ
t
1.4 V
CL
t
CH
t
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V4200GDL-7.5 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x64 SDRAM Module |
| HYS64V4200GU-10 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8 | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8B | 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4220GCDL-7.5 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x64 SDRAM Module |
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