參數(shù)資料
型號: HYS 64V4200GDL
廠商: SIEMENS AG
英文描述: 3.3 V SDRAM Modules(3.3 V 同步動態(tài)RAM模塊)
中文描述: 3.3伏內(nèi)存模塊(3.3伏同步動態(tài)內(nèi)存模塊)
文件頁數(shù): 2/15頁
文件大小: 126K
代理商: HYS 64V4200GDL
HYS 64V4200GDL/HYS 64V8220GDL
144-pin SO-DIMM SDRAM Modules
Data Book
2
12.99
Note: All part numbers end with a place code (not shown), designating the die revision. Consult
factory for current revision. Example: HYS 64V8220GDL-8-B, indicating Rev.B dies are
used for SDRAM components.
Product Sprectrum
Organi-
zation
4M
×
64
4M
×
64
8M
×
64
8M
×
64
Partnumber
SDRAMs
Used
4 4M
×
16
4 4M
×
16
8 4M
×
16
8 4M
×
16
Row
Addr.
Bank
Select
Column
Addr.
Refresh Period
HYS 64V4200GDL-7.5
12
BA0, BA1
8
4k
64 ms
HYS 64V4200GDL-8
12
BA0, BA1
8
4k
64 ms
HYS 64V8220GDL-7.5
12
BA0, BA1
8
4k
64 ms
HYS 64V8220GDL-8
12
BA0, BA1
8
4k
64 ms
Card Dimensions
Organization
4M
×
64
8M
×
64
PCB-Board
L
×
H
×
T [mm]
67.60
×
25.40
×
3.80
67.60
×
31.75
×
3.80
Intel Rev. 1.0
Intel Rev. 1.0
Pin Definitions and Functions
A0 - A11
Address Inputs for 4M
×
64 &
8M
×
64 modules
Bank Selects for 4M
×
64,
8M
×
64 & 16M
×
64 modules
DQ0 - DQ63 Data Input/Output
DQMB0 -
DQMB7
Data Mask
BA0, BA1
CS0 - CS3 Chip Select
V
DD
V
SS
SCL
Power (+ 3.3 Volt)
RAS
Row Address Strobe
Ground
CAS
Column Address Strobe
Clock for Presence Detect
WE
Read/Write Input
SDA
Serial Data Out for Presence Detect
CKE0
Clock Enable
N.C.
No Connection
CLK0
Clock Input
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYS64V4200GDL-7.5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module
HYS64V4200GU-10 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4200GU-8 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4200GU-8B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
HYS64V4220GCDL-7.5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module