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參數(shù)資料
| 型號： | HYS 64V4200GDL |
| 廠商： | SIEMENS AG |
| 英文描述： | 3.3 V SDRAM Modules(3.3 V 同步動態(tài)RAM模塊) |
| 中文描述： | 3.3伏內(nèi)存模塊（3.3伏同步動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 126K |
| 代理商： | HYS 64V4200GDL |
HYS 64V4200GDL/HYS 64V8220GDL
144-pin SO-DIMM SDRAM Modules
Data Book
11
12.99
SPD-Table
Byte#
Description
SPD Entry Value
Hex
4
-
8
-
4
80
08
04
0C
08
-
8
-
0
1
2
3
4
5
6
7
8
9
10
11
12
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses (without BS)
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL = 3
SDRAM Access Time from Clock at CL = 3
DIMM Config (Error Det/Corr.)
Refresh Rate/Type
128
256
SDRAM
–
–
1
64
0
LVTTL
7.5/10.0 ns
5.4/6.0 ns
none
Self-Refresh,
15.6
μ
s
–
n/a/x8
t
CCD
= 1 CLK
01
02
01
02
40
00
01
75
54
75
54
A0
60
A0
60
00
80
13
14
15
SDRAM Width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay for Back-to-Back
Random Column Address
Burst Length Supported
10
00
01
16
1, 2, 4, 8 & full
page
2
2 & 3
CS latency = 0
Write latency = 0
non buffered/non
reg.
V
DD
tol +/– 10%
10.0 ns
6.0 ns
not supported
not supported
20 ns
14/16 ns
20 ns
45 ns
32 MB
1.5/2 ns
0.8/1 ns
8F
17
18
19
20
21
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes
04
06
01
01
00
22
23
24
25
26
27
28
29
30
31
32
33
SDRAM Device Attributes: General
SDRAM Cycle Time at CL = 2
SDRAM Access Time from Clock at CL = 2
SDRAM Cycle Time at CL = 1
SDRAM Access Time from Clock at CL = 1
Minimum Row Precharge Time
Minimum Row Active to Row Active Delay
Minimum RAS to CAS Delay
Minimum RAS Pulse Width
Module Bank Density (per bank)
SDRAM Input Setup Time
SDRAM Input Hold Time
0E
A0
60
A0
60
A0
60
A0
60
FF
FF
14
0F
0F
10
10
14
2D
08
15
08
15
08
20
10
20
10
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PDF描述 |
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| HYS 64V8301GU | 3.3 V 8M *64/72-Bit SDRAM Modules(3.3 V 8M×64/72-Bit 同步動態(tài)RAM 模塊) |
| HYS 72D128020GR | 2.5 V 184-pin Registered DDR-I SDRAM Modules(2.5 V 184腳、1G位寄存型 DDR-I SDRAM 模塊) |
| HYS 72D32000GR | 2.5 V 184-pin Registered DDR-I SDRAM Modules(2.5 V 184腳、256M位寄存型 DDR-I SDRAM 模塊) |
| HYS 72D64000GR | 2.5 V 184-pin Registered DDR-I SDRAM Modules(2.5 V 184腳、512M位寄存型 DDR-I SDRAM 模塊) |
| HYS 72D64020GR | 2.5 V 184-pin Registered DDR-I SDRAM Modules(2.5 V 184腳、512M位寄存型 DDR-I SDRAM 模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V4200GDL-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYS64V4200GU-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4200GU-8B | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4220GCDL-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
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