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參數(shù)資料
| 型號： | IBM25PPC750-DB0M2500 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 250 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 22/42頁 |
| 文件大?。?/td> | 496K |
| 代理商： | IBM25PPC750-DB0M2500 |
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7/15/99
v 3.2
Datasheet
Page 29
Preliminary Copy
PowerPC 750TM SCM RISC Microprocessor
System Design Information
This section provides electrical and thermal design recommendations for successful application of the 750.
PLL Conguration
The 750 PLL is configured by the PLL_CFG[0-3-] signals. For a given SYSCLK (bus) frequency, the PLL con-
figuration signals set the internal CPU and VCO frequency of operation. The PLL configuration for the 750 is
shown in Table 15 for nominal frequencies.
Table 15. 750 Microprocessor PLL Conguration
PLL_CFG
(0:3)
Processor to
Bus Fre-
quency Ratio
(r)
VCO
Divider (d)
Frequency Range Supported by VCO having an example range of
VCOMIN=300 to VCOMAX=600 (MHz)
SYSCLK
Core
bin
dec
Min=
VCOmin/(r*d)
Max=
VCOmax/(r*d)
Min=
VCOmin/d
Max=
VCOmax/d
0000
0
Rsv1
n/a
0001
1
7.5x
2
252
40
1506
300
0010
2
7x
2
252
42
0011
3
PLL Bypass3
n/a
0100
4
Rsv1
n/a
1506
300
0101
5
6.5x
2
252
46
0110
6
Rsv1
n/a
0111
7
4.5x
2
33
66
15064
300
1000
8
3x
2
50
1005
1001
9
5.5x
2
27
54
1010
10
4x
2
37
75
1011
11
5x
2
30
60
1100
12
8x
2
252
38
1101
13
6x
2
25
50
1110
14
3.5x
2
43
865
1111
15
Off4
n/a
Off
Note:
1. Reserved settings.
2. SYSCLK min is limited by the lowest frequency that manufacturing will support, see Section , “Clock AC Specications,”
for valid SYSCLK and VCO frequencies.
3. In PLL-bypass mode, the SYSCLK input signal clocks the internal processor directly, the PLL is disabled, and the bus
mode is set for 1:1 mode operation. This mode is intended for factory use only. Note: The AC timing specications given
in the document do not apply in PLL-bypass mode.
4. In Clock - off mode, no clocking occurs inside the 750 regardless of the SYSCLK input.
5. SYSCLK max is valid for 300MHz core only, for slower cores, this limit is 83.3MHz as specied in Section, “Clock AC
6. Processor frequency min is 150MHz for all core speeds including 275MHz. The frequency min is 200MHz for the 300
MHz core speed. See Section , “Clock AC Specications,” for valid SYSCLK and VCO frequencies.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| IBM25PPC750FL-GR0123V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FL-GR0124V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FL-GR0133T | 制造商:IBM 功能描述:IBMIBM25PPC750FL-GR0133T CSOI9SG LOGIC P |
| IBM25PPC750FL-GR0133V | 制造商:IBM 功能描述:MPU 750XX RISC 32BIT - Trays |
| IBM25PPC750FL-GR1024T | 制造商:IBM 功能描述: |
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