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參數(shù)資料
| 型號： | IBM25PPC750-DB0M2500 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 250 MHz, RISC PROCESSOR, CBGA360 |
| 封裝： | 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360 |
| 文件頁數(shù)： | 7/42頁 |
| 文件大?。?/td> | 496K |
| 代理商： | IBM25PPC750-DB0M2500 |
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7/15/99
v 3.2
Datasheet
Page 15
Preliminary Copy
PowerPC 750TM SCM RISC Microprocessor
L2 Clock AC Specications
Table 10 provides the L2CLK output AC timing specifications as defined in Figure 13.
Table 10. L2CLK Output AC Timing Specications
See Table 2 for operating conditions.
Num
Characteristic
Min
Max
Unit
Notes
L2CLK frequency
80
150
MHz
1,5, 7
22
L2CLK cycle time
6.6
12.5
ns
7
23
L2CLK duty cycle
50
%
2
L2CLK jitter
±150
ps
3,6
Internal DLL-relock time
640
—
L2CLK
4
Note:
1. L2CLK outputs are L2CLKOUTA, L2CLKOUTB, and L2SYNC_OUT pins. The internal design supports higher L2CLK fre-
quencies; however, the L2 I/O drivers have been designed to support a 150MHz L2 bus loaded with 4 off-the-shelf pipe-
lined synchronous burst SRAMs. Running the L2 bus beyond 150MHz would require tightly coupled customized SRAMs
or a multi-chip module (MCM) implementation. The L2CLK frequency to core frequency settings must be chosen such
that the resulting L2CLK frequency and core frequency do not exceed their respective maximum or minimum operating
frequencies. L2CLKOUTA and L2CLKOUTB must have equal loading.
2. The nominal duty cycle of the L2CLK is 50% measured at midpoint voltage.
3. The total input jitter (short term and long term combined) must be under
± 150ps.
4. The DLL re-lock time is specied in terms of L2CLKs. The number in the table must be multiplied by the period of L2CLK
to compute the actual time duration in nanoseconds. Re-lock timing is guaranteed by design and characterization, and
is not tested.
5. The L2CR [L2SL] bit should be set for L2CLK frequencies less than 110MHz.
6. Guaranteed by design and characterization, and not tested.
7. Running the L2 up to 150MHz is specied only for the 300MHz core and138MHz is specied only for the 275MHz core.
For all core frequencies equal or below 266MHz, the maximum L2 frequency is 133MHz.
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